1/*
2 * Copyright (c) 2020, NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_rt1024.dtsi>
10#include "mimxrt1024_evk-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "NXP MIMXRT1024-EVK board";
15	compatible = "nxp,mimxrt1024";
16
17	aliases {
18		led0 = &green_led;
19		sw0 = &user_button;
20		watchdog0 = &wdog0;
21		magn0 = &fxos8700;
22		accel0 = &fxos8700;
23		sdhc0 = &usdhc1;
24	};
25
26	chosen {
27		zephyr,flash-controller = &w25q32jvwj0;
28		zephyr,flash = &w25q32jvwj0;
29		zephyr,code-partition = &slot0_partition;
30		zephyr,sram = &sdram0;
31		zephyr,itcm = &itcm;
32		zephyr,dtcm = &dtcm;
33		zephyr,console = &lpuart1;
34		zephyr,shell-uart = &lpuart1;
35		zephyr,canbus = &flexcan1;
36	};
37
38	sdram0: memory@80000000 {
39		/* ISSI IS42S16160J-6TLI */
40		device_type = "memory";
41		reg = <0x80000000 DT_SIZE_M(32)>;
42	};
43
44	leds {
45		compatible = "gpio-leds";
46		green_led: led-1 {
47			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
48			label = "User LD1";
49		};
50	};
51
52	gpio_keys {
53		compatible = "gpio-keys";
54		user_button: button-1 {
55			label = "User SW4";
56			gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
57			zephyr,code = <INPUT_KEY_0>;
58		};
59	};
60
61	arduino_header: connector {
62		compatible = "arduino-header-r3";
63		#gpio-cells = <2>;
64		gpio-map-mask = <0xffffffff 0xffffffc0>;
65		gpio-map-pass-thru = <0 0x3f>;
66		gpio-map = <0 0 &gpio1 26 0>,	/* A0 */
67			   <1 0 &gpio1 27 0>,	/* A1 */
68			   <2 0 &gpio1 28 0>,	/* A2 */
69			   <3 0 &gpio1 29 0>,	/* A3 */
70			   <4 0 &gpio1 31 0>,	/* A4 */
71			   <5 0 &gpio1 30 0>,	/* A5 */
72			   <6 0 &gpio1 25 0>,	/* D0 */
73			   <7 0 &gpio1 24 0>,	/* D1 */
74			   <8 0 &gpio1 9 0>,	/* D2 */
75			   <9 0 &gpio1 7 0>,	/* D3 */
76			   <10 0 &gpio1 5 0>,	/* D4 */
77			   <11 0 &gpio1 6 0>,	/* D5 */
78			   <12 0 &gpio1 14 0>,	/* D6 */
79			   <13 0 &gpio1 22 0>,	/* D7 */
80			   <14 0 &gpio1 23 0>,	/* D8 */
81			   <15 0 &gpio1 15 0>,	/* D9 */
82			   <16 0 &gpio1 11 0>,	/* D10 */
83			   <17 0 &gpio1 12 0>,	/* D11 */
84			   <18 0 &gpio1 13 0>,	/* D12 */
85			   <19 0 &gpio1 10 0>,	/* D13 */
86			   <20 0 &gpio3 23 0>,	/* D14 */
87			   <21 0 &gpio3 22 0>;	/* D15 */
88	};
89};
90
91arduino_serial: &lpuart2 {
92	pinctrl-0 = <&pinmux_lpuart2>;
93	pinctrl-1 = <&pinmux_lpuart2_sleep>;
94	pinctrl-names = "default", "sleep";
95};
96
97&w25q32jvwj0 {
98	status = "okay";
99	partitions {
100		compatible = "fixed-partitions";
101		#address-cells = <1>;
102		#size-cells = <1>;
103		boot_partition: partition@0 {
104			label = "mcuboot";
105			reg = <0x00000000 DT_SIZE_K(128)>;
106		};
107		/* The MCUBoot swap-move algorithm uses the last 2 sectors
108		 * of the primary slot0 for swap status and move.
109		 */
110		slot0_partition: partition@20000 {
111			label = "image-0";
112			reg = <0x00020000 (DT_SIZE_K(1920) + DT_SIZE_K(8))>;
113		};
114		slot1_partition: partition@202000 {
115			label = "image-1";
116			reg = <0x00202000 DT_SIZE_K(1920)>;
117		};
118		storage_partition: partition@3E2000 {
119			label = "storage";
120			reg = <0x003E2000 DT_SIZE_K(120)>;
121		};
122	};
123};
124
125&enet_mac {
126	status = "okay";
127	pinctrl-0 = <&pinmux_enet>;
128	pinctrl-names = "default";
129	phy-handle = <&phy>;
130	zephyr,random-mac-address;
131	phy-connection-type = "rmii";
132};
133
134&enet_mdio {
135	status = "okay";
136	pinctrl-0 = <&pinmux_enet_mdio>;
137	pinctrl-names = "default";
138	phy: phy@0 {
139		compatible = "microchip,ksz8081";
140		reg = <0>;
141		status = "okay";
142		reset-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
143		int-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
144		microchip,interface-type = "rmii";
145	};
146};
147
148&enet_ptp_clock {
149	status = "okay";
150	pinctrl-0 = <&pinmux_ptp>;
151	pinctrl-names = "default";
152};
153
154&lpuart1 {
155	status = "okay";
156	current-speed = <115200>;
157	pinctrl-0 = <&pinmux_lpuart1>;
158	pinctrl-1 = <&pinmux_lpuart1_sleep>;
159	pinctrl-names = "default", "sleep";
160};
161
162&lpuart2 {
163	pinctrl-0 = <&pinmux_lpuart2>;
164	pinctrl-1 = <&pinmux_lpuart2_sleep>;
165	pinctrl-names = "default", "sleep";
166};
167
168&flexcan1 {
169	status = "okay";
170	pinctrl-0 = <&pinmux_flexcan1>;
171	pinctrl-names = "default";
172
173	can-transceiver {
174		max-bitrate = <5000000>;
175	};
176};
177
178&wdog0 {
179	status = "okay";
180};
181
182&lpi2c4 {
183	status = "okay";
184	pinctrl-0 = <&pinmux_lpi2c4>;
185	pinctrl-names = "default";
186	scl-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
187	sda-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
188
189	fxos8700: fxos8700@1f {
190		compatible = "nxp,fxos8700";
191		reg = <0x1f>;
192	};
193};
194
195&edma0 {
196	status = "okay";
197};
198
199&lpspi1 {
200	status = "okay";
201	/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
202	dmas = <&edma0 0 13>, <&edma0 1 14>;
203	dma-names = "rx", "tx";
204	pinctrl-0 = <&pinmux_lpspi1>;
205	pinctrl-names = "default";
206};
207
208&adc1 {
209	status = "okay";
210	pinctrl-0 = <&pinmux_adc1>;
211	pinctrl-names = "default";
212};
213
214/* GPT and Systick are enabled. If power management is enabled, the GPT
215 * timer will be used instead of systick, as allows the core clock to
216 * be gated.
217 */
218&gpt_hw_timer {
219	status = "okay";
220};
221
222&systick {
223	status = "okay";
224};
225
226zephyr_udc0: &usb1 {
227	status = "okay";
228};
229
230&usdhc1 {
231	status = "okay";
232	pinctrl-0 = <&pinmux_usdhc1>;
233	pinctrl-1 = <&pinmux_usdhc1_slow>;
234	pinctrl-2 = <&pinmux_usdhc1_med>;
235	pinctrl-3 = <&pinmux_usdhc1_fast>;
236	pinctrl-names = "default", "slow", "med", "fast";
237	cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
238	pwr-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
239	no-1-8-v;
240	sdmmc {
241		compatible = "zephyr,sdmmc-disk";
242		status = "okay";
243	};
244};
245