1/*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nordic/nrf54h20_cpuapp.dtsi>
10#include "nrf54h20dk_nrf54h20-memory_map.dtsi"
11#include "nrf54h20dk_nrf54h20-ipc_conf.dtsi"
12#include "nrf54h20dk_nrf54h20-pinctrl.dtsi"
13
14/delete-node/ &cpurad_cpusys_ipc;
15/delete-node/ &cpusec_cpurad_ipc;
16
17/ {
18	compatible = "nordic,nrf54h20dk_nrf54h20-cpuapp";
19	model = "Nordic nRF54H20 DK nRF54H20 Application MCU";
20
21	chosen {
22		zephyr,console = &uart136;
23		zephyr,code-partition = &cpuapp_slot0_partition;
24		zephyr,flash = &mram1x;
25		zephyr,sram = &cpuapp_data;
26		zephyr,shell-uart = &uart136;
27		zephyr,ieee802154 = &cpuapp_ieee802154;
28		zephyr,bt-hci = &bt_hci_ipc0;
29		nordic,802154-spinel-ipc = &ipc0;
30		zephyr,canbus = &can120;
31	};
32
33	aliases {
34		led0 = &led0;
35		led1 = &led1;
36		led2 = &led2;
37		led3 = &led3;
38		resetinfo = &cpuapp_resetinfo;
39		pwm-led0 = &pwm_led2;
40		sw0 = &button0;
41		sw1 = &button1;
42		sw2 = &button2;
43		sw3 = &button3;
44		ipc-to-cpusys = &cpuapp_cpusys_ipc;
45		watchdog0 = &wdt010;
46	};
47
48	buttons {
49		compatible = "gpio-keys";
50
51		button0: button_0 {
52			gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
53			label = "Push button 0";
54			zephyr,code = <INPUT_KEY_0>;
55		};
56
57		button1: button_1 {
58			gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
59			label = "Push button 1";
60			zephyr,code = <INPUT_KEY_1>;
61		};
62
63		button2: button_2 {
64			gpios = <&gpio0 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
65			label = "Push button 2";
66			zephyr,code = <INPUT_KEY_2>;
67		};
68
69		button3: button_3 {
70			gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
71			label = "Push button 3";
72			zephyr,code = <INPUT_KEY_3>;
73		};
74	};
75
76	leds {
77		compatible = "gpio-leds";
78
79		led0: led_0 {
80			gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>;
81			label = "Green LED 0";
82		};
83
84		led1: led_1 {
85			gpios = <&gpio9 1 GPIO_ACTIVE_HIGH>;
86			label = "Green LED 1";
87		};
88
89		led2: led_2 {
90			gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
91			label = "Green LED 2";
92		};
93
94		led3: led_3 {
95			gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
96			label = "Green LED 3";
97		};
98	};
99
100	pwmleds {
101		compatible = "pwm-leds";
102		/*
103		 * LEDs are connected to GPIO Port 9 - pins 0-3. There is no valid hardware
104		 * configuration to pass PWM signal on pis 0 and 1. First valid config is P9.2.
105		 * Signal on PWM130's channel 0 can be passed directly on GPIO Port 9 pin 2.
106		 */
107		pwm_led2: pwm_led_2 {
108			pwms = <&pwm130 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
109		};
110	};
111};
112
113&cpuapp_ram0x_region {
114	status = "okay";
115};
116
117&cpuapp_cpurad_ram0x_region {
118	status = "okay";
119};
120
121&shared_ram3x_region {
122	status = "okay";
123};
124
125&ram21_region {
126	status = "okay";
127};
128
129&cpuapp_bellboard {
130	status = "okay";
131	interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>;
132	interrupt-names = "irq0";
133	/* irq0: 0: cpuapp-cpusec, 6: cpuapp-cpusys, 13: cpuapp-cpuppr, 18: cpuapp-cpurad */
134	nordic,interrupt-mapping = <0x00042041 0>;
135};
136
137&cpurad_bellboard {
138	status = "okay";
139};
140
141&cpusys_vevif {
142	status = "okay";
143};
144
145&cpusec_cpuapp_ipc {
146	mbox-names = "tx", "rx";
147	tx-region = <&cpuapp_cpusec_ipc_shm>;
148	rx-region = <&cpusec_cpuapp_ipc_shm>;
149};
150
151ipc0: &cpuapp_cpurad_ipc {
152	status = "okay";
153	mbox-names = "rx", "tx";
154	tx-region = <&cpuapp_cpurad_ipc_shm>;
155	rx-region = <&cpurad_cpuapp_ipc_shm>;
156	tx-blocks = <32>;
157	rx-blocks = <32>;
158
159	bt_hci_ipc0: bt_hci_ipc0 {
160		compatible = "zephyr,bt-hci-ipc";
161		status = "okay";
162	};
163};
164
165&cpuapp_cpusys_ipc {
166	status = "okay";
167	mbox-names = "rx", "tx";
168	tx-region = <&cpuapp_cpusys_ipc_shm>;
169	rx-region = <&cpusys_cpuapp_ipc_shm>;
170};
171
172&cpuapp_cpuppr_ipc {
173	mbox-names = "rx", "tx";
174	tx-region = <&cpuapp_cpuppr_ipc_shm>;
175	rx-region = <&cpuppr_cpuapp_ipc_shm>;
176};
177
178&cpuapp_dma_region {
179	status = "okay";
180};
181
182&dma_fast_region {
183	status = "okay";
184};
185
186&cpuapp_rx_partitions {
187	status = "okay";
188};
189
190&cpuapp_rw_partitions {
191	status = "okay";
192};
193
194&cpuppr_vpr {
195	execution-memory = <&cpuppr_code_data>;
196	source-memory = <&cpuppr_code_partition>;
197};
198
199&gpiote130 {
200	status = "okay";
201	owned-channels = <0 1 2 3 4 5 6 7>;
202};
203
204&gpio0 {
205	status = "okay";
206};
207
208&gpio9 {
209	status = "okay";
210};
211
212&grtc {
213	status = "okay";
214	child-owned-channels = <5 6>;
215	nonsecure-channels = <5 6>;
216	owned-channels = <4 5 6>;
217};
218
219&uart135 {
220	current-speed = <115200>;
221	pinctrl-0 = <&uart135_default>;
222	pinctrl-1 = <&uart135_sleep>;
223	pinctrl-names = "default", "sleep";
224};
225
226&uart136 {
227	status = "okay";
228	memory-regions = <&cpuapp_dma_region>;
229	current-speed = <115200>;
230	pinctrl-0 = <&uart136_default>;
231	pinctrl-1 = <&uart136_sleep>;
232	pinctrl-names = "default", "sleep";
233	hw-flow-control;
234};
235
236&gpio6 {
237	status = "okay";
238};
239
240&exmif {
241	cs-gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
242	pinctrl-0 = <&exmif_default>;
243	pinctrl-names = "default";
244	status = "okay";
245	mx25uw63: mx25uw6345g@0 {
246		compatible = "jedec,spi-nor";
247		status = "disabled";
248		reg = <0>;
249		spi-max-frequency = <DT_FREQ_M(48)>;
250		jedec-id = [c2 84 37];
251		sfdp-bfp = [
252			e5 20 8a ff  ff ff ff 03  00 ff 00 ff  00 ff 00 ff
253			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 10 d8
254			00 ff 00 ff  87 79 01 00  84 12 00 c4  cc 04 67 46
255			30 b0 30 b0  f4 bd d5 5c  00 00 00 ff  10 10 00 20
256			00 00 00 00  00 00 7c 23  48 00 00 00  00 00 88 88
257		];
258		size = <67108864>;
259		has-dpd;
260		t-enter-dpd = <10000>;
261		t-exit-dpd = <30000>;
262	};
263};
264
265&cpuapp_ieee802154 {
266	status = "okay";
267};
268
269zephyr_udc0: &usbhs {
270	status = "okay";
271};
272
273&canpll {
274	status = "okay";
275};
276
277&can120 {
278	status = "okay";
279	pinctrl-0 = <&can120_default>;
280	pinctrl-names = "default";
281};
282
283&pwm130 {
284	status = "okay";
285	pinctrl-0 = <&pwm130_default>;
286	pinctrl-1 = <&pwm130_sleep>;
287	pinctrl-names = "default", "sleep";
288	memory-regions = <&cpuapp_dma_region>;
289};
290
291&adc {
292	memory-regions = <&cpuapp_dma_region>;
293	status = "okay";
294};
295