1.. _beaglev_fire: 2 3BeagleV®-Fire 4############# 5 6Overview 7******** 8 9BeagleV®-Fire is a revolutionary single-board computer (SBC) powered by the Microchip’s 10PolarFire® MPFS025T 5x core RISC-V System on Chip (SoC) with FPGA fabric. BeagleV®-Fire opens up new 11horizons for developers, tinkerers, and the open-source community to explore the vast potential of 12RISC-V architecture and FPGA technology. It has the same P8 & P9 cape header pins as BeagleBone 13Black allowing you to stack your favorite BeagleBone cape on top to expand it’s capability. 14Built around the powerful and energy-efficient RISC-V instruction set architecture (ISA) along with 15its versatile FPGA fabric, BeagleV®-Fire SBC offers unparalleled opportunities for developers, 16hobbyists, and researchers to explore and experiment with RISC-V technology. 17 18.. image:: img/BeagleV-Fire-Front-Annotated-768x432.webp 19 :align: center 20 :alt: beaglev_fire 21 22Building 23======== 24 25Applications for the ``beaglev_fire`` board configuration can be built as usual: 26 27.. zephyr-app-commands:: 28 :zephyr-app: samples/hello_world 29 :board: beaglev_fire 30 :goals: build 31 32Debugging 33========= 34 35In order to upload the application to the device, you'll need OpenOCD and GDB 36with RISC-V support. 37You can get them as a part of SoftConsole SDK. 38Download and installation instructions can be found on 39`Microchip's SoftConsole website 40<https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-debug/softconsole>`_. 41 42You will also require a Debugger such as Microchip's FlashPro5/6. 43 44Connect to BeagleV-Fire UART debug port using a 3.3v USB to UART bridge. 45Now you can run ``tio <port>`` in a terminal window to access the UART debug port connection. Once you 46are connected properly you can press the Reset button which will show you a progress bar like: 47 48.. image:: img/board-booting.png 49 :align: center 50 :alt: beaglev_fire 51 52Once you see that progress bar on your screen you can start pressing any button (0-9/a-z) which 53will interrupt the Hart Software Services from booting its payload. 54 55With the necessary tools installed, you can connect to the board using OpenOCD. 56from a different terminal, run: 57 58.. code-block:: bash 59 60 <softconsole_path>/openocd/bin/openocd --file \ 61 <softconsole_path>/openocd/share/openocd/scripts/board/microsemi-riscv.cfg 62 63 64Leave it running, and in a different terminal, use GDB to upload the binary to 65the board. You can use the RISC-V GDB from the Zephyr SDK. 66launch GDB: 67 68.. code-block:: bash 69 70 <path_to_zephyr_sdk>/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gdb 71 72 73 74Here is the GDB terminal command to connect to the device 75and load the binary: 76 77.. code-block:: bash 78 79 set arch riscv:rv64 80 set mem inaccessible-by-default off 81 file <path_to_zehyr.elf> 82 target extended-remote localhost:3333 83 load 84 break main 85 continue 86