1 /*
2 * Copyright (c) 2023 Texas Instruments Incorporated
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/arch/cpu.h>
8 #include <zephyr/kernel.h>
9 #include <zephyr/device.h>
10 #include <zephyr/init.h>
11 #include <soc.h>
12
13 #define ADDR_TRANSLATE_RAT_BASE_ADDR (0x044200000u)
14 #define PINCTRL_BASE_ADDR (0x4080000u)
15 #define KICK0_UNLOCK_VAL (0x68EF3490U)
16 #define KICK1_UNLOCK_VAL (0xD172BC5AU)
17 #define CSL_MCU_PADCONFIG_LOCK0_KICK0_OFFSET (0x1008)
18 #define CSL_MCU_PADCONFIG_LOCK1_KICK0_OFFSET (0x5008)
19
20 static struct address_trans_region_config region_config[] = {
21 {
22 .system_addr = 0x0u,
23 .local_addr = 0x80000000u,
24 .size = address_trans_region_size_512M,
25 },
26 {
27 .local_addr = 0xA0000000u,
28 .system_addr = 0x20000000u,
29 .size = address_trans_region_size_512M,
30 },
31 {
32 .local_addr = 0xC0000000u,
33 .system_addr = 0x40000000u,
34 .size = address_trans_region_size_512M,
35 },
36 {
37 .local_addr = 0x60000000u,
38 .system_addr = 0x60000000u,
39 .size = address_trans_region_size_512M,
40 },
41
42 /*
43 * Add regions here if you want to map more memory.
44 */
45 };
46
mmr_unlock(void)47 static void mmr_unlock(void)
48 {
49 uint32_t baseAddr = PINCTRL_BASE_ADDR;
50 uintptr_t kickAddr;
51
52 /* Lock 0 */
53 kickAddr = baseAddr + CSL_MCU_PADCONFIG_LOCK0_KICK0_OFFSET;
54 sys_write32(KICK0_UNLOCK_VAL, kickAddr); /* KICK 0 */
55 kickAddr = kickAddr + sizeof(uint32_t *);
56 sys_write32(KICK1_UNLOCK_VAL, kickAddr); /* KICK 1 */
57
58 /* Lock 1 */
59 kickAddr = baseAddr + CSL_MCU_PADCONFIG_LOCK1_KICK0_OFFSET;
60 sys_write32(KICK0_UNLOCK_VAL, kickAddr); /* KICK 0 */
61 kickAddr = kickAddr + sizeof(uint32_t *);
62 sys_write32(KICK1_UNLOCK_VAL, kickAddr); /* KICK 1 */
63 }
64
am62x_m4_init(void)65 static int am62x_m4_init(void)
66 {
67 sys_mm_drv_ti_rat_init(
68 region_config, ADDR_TRANSLATE_RAT_BASE_ADDR, ARRAY_SIZE(region_config));
69 mmr_unlock();
70 return 0;
71 }
72
73 SYS_INIT(am62x_m4_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
74
