1 /*
2  * Copyright (c) 2020 STMicroelectronics
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32WL processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 
15 #include <stm32wlxx_ll_system.h>
16 
17 #include <zephyr/logging/log.h>
18 
19 #include <cmsis_core.h>
20 
21 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
22 LOG_MODULE_REGISTER(soc);
23 
24 
25 /**
26  * @brief Perform basic hardware initialization at boot.
27  *
28  * This needs to be run from the very beginning.
29  * So the init priority has to be 0 (zero).
30  *
31  * @return 0
32  */
stm32wl_init(void)33 static int stm32wl_init(void)
34 {
35 	/* Enable CPU data and instruction cache */
36 	LL_FLASH_EnableInstCache();
37 	LL_FLASH_EnableDataCache();
38 
39 	/* Update CMSIS SystemCoreClock variable (HCLK) */
40 	/* At reset, system core clock is set to 4 MHz from MSI */
41 	SystemCoreClock = 4000000;
42 
43 	return 0;
44 }
45 
46 SYS_INIT(stm32wl_init, PRE_KERNEL_1, 0);
47