1 /* 2 * Copyright (c) 2020 Mohamed ElShahawi 3 * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32_H_ 9 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32_H_ 10 11 /* System Clock Source */ 12 #define ESP32_CLK_SRC_XTAL 0U 13 #define ESP32_CLK_SRC_PLL 1U 14 #define ESP32_CLK_SRC_RTC8M 2U 15 #define ESP32_CLK_SRC_APLL 3U 16 17 /* Supported CPU Frequencies */ 18 #define ESP32_CLK_CPU_26M 26000000 19 #define ESP32_CLK_CPU_40M 40000000 20 #define ESP32_CLK_CPU_80M 80000000 21 #define ESP32_CLK_CPU_160M 160000000 22 #define ESP32_CLK_CPU_240M 240000000 23 24 /* Supported XTAL Frequencies */ 25 #define ESP32_CLK_XTAL_24M 0U 26 #define ESP32_CLK_XTAL_26M 1U 27 #define ESP32_CLK_XTAL_40M 2U 28 #define ESP32_CLK_XTAL_AUTO 3U 29 30 /* Supported RTC fast clock frequencies */ 31 #define ESP32_RTC_FAST_CLK_FREQ_8M 8500000U 32 33 /* Supported RTC slow clock frequencies */ 34 #define ESP32_RTC_SLOW_CLK_FREQ_150K 150000U 35 #define ESP32_RTC_SLOW_CLK_FREQ_32K 32000U 36 #define ESP32_RTC_SLOW_CLK_FREQ_8MD256 (ESP32_RTC_FAST_CLK_FREQ_8M / 256) 37 38 /* Modules IDs 39 * These IDs are actually offsets in CLK and RST Control registers. 40 * These IDs shouldn't be changed unless there is a Hardware change 41 * from Espressif. 42 * 43 * Basic Modules 44 * Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG 45 */ 46 #define ESP32_LEDC_MODULE 0 47 #define ESP32_UART0_MODULE 1 48 #define ESP32_UART1_MODULE 2 49 #define ESP32_UART2_MODULE 3 50 #define ESP32_I2C0_MODULE 4 51 #define ESP32_I2C1_MODULE 5 52 #define ESP32_I2S0_MODULE 6 53 #define ESP32_I2S1_MODULE 7 54 #define ESP32_TIMG0_MODULE 8 55 #define ESP32_TIMG1_MODULE 9 56 #define ESP32_PWM0_MODULE 10 57 #define ESP32_PWM1_MODULE 11 58 #define ESP32_UHCI0_MODULE 12 59 #define ESP32_UHCI1_MODULE 13 60 #define ESP32_RMT_MODULE 14 61 #define ESP32_PCNT_MODULE 15 62 #define ESP32_SPI_MODULE 16 63 #define ESP32_HSPI_MODULE 17 64 #define ESP32_VSPI_MODULE 18 65 #define ESP32_SPI_DMA_MODULE 19 66 #define ESP32_SDMMC_MODULE 20 67 #define ESP32_SDIO_SLAVE_MODULE 21 68 #define ESP32_TWAI_MODULE 22 69 #define ESP32_CAN_MODULE ESP32_TWAI_MODULE 70 #define ESP32_EMAC_MODULE 23 71 #define ESP32_RNG_MODULE 24 72 #define ESP32_WIFI_MODULE 25 73 #define ESP32_BT_MODULE 26 74 #define ESP32_WIFI_BT_COMMON_MODULE 27 75 #define ESP32_BT_BASEBAND_MODULE 28 76 #define ESP32_BT_LC_MODULE 29 77 #define ESP32_AES_MODULE 30 78 #define ESP32_SHA_MODULE 31 79 #define ESP32_RSA_MODULE 32 80 #define ESP32_SARADC_MODULE 33 81 #define ESP32_MODULE_MAX 34 82 83 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32_H_ */ 84