1 /*
2  * Copyright (c) 2021 Jonathan Hahn
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #define DT_DRV_COMPAT st_i3g4250d
8 
9 #include <zephyr/logging/log.h>
10 #include "i3g4250d.h"
11 
12 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
13 
14 #define I3G4250D_SPI_READM      (3 << 6)        /* 0xC0 */
15 #define I3G4250D_SPI_WRITEM     (1 << 6)        /* 0x40 */
16 
17 LOG_MODULE_DECLARE(i3g4250d, CONFIG_SENSOR_LOG_LEVEL);
18 
i3g4250d_spi_read(const struct device * dev,uint8_t reg,uint8_t * data,uint16_t len)19 static int i3g4250d_spi_read(const struct device *dev, uint8_t reg,
20 				 uint8_t *data, uint16_t len)
21 {
22 	int ret;
23 	const struct i3g4250d_device_config *config = dev->config;
24 	uint8_t buffer_tx[2] = { reg | I3G4250D_SPI_READM, 0 };
25 	const struct spi_buf tx_buf = {
26 		.buf = buffer_tx,
27 		.len = 2,
28 	};
29 	const struct spi_buf_set tx = {
30 		.buffers = &tx_buf,
31 		.count = 1,
32 	};
33 	const struct spi_buf rx_buf[2] = {
34 		{
35 			.buf = NULL,
36 			.len = 1,
37 		},
38 		{
39 			.buf = data,
40 			.len = len,
41 		}
42 	};
43 	const struct spi_buf_set rx = {
44 		.buffers = rx_buf,
45 		.count = 2,
46 	};
47 
48 	ret = spi_transceive_dt(&config->spi, &tx, &rx);
49 	if (ret < 0) {
50 		return ret;
51 	}
52 
53 	return 0;
54 }
55 
i3g4250d_spi_write(const struct device * dev,uint8_t reg,uint8_t * data,uint16_t len)56 static int i3g4250d_spi_write(const struct device *dev, uint8_t reg,
57 				  uint8_t *data, uint16_t len)
58 {
59 	int ret;
60 	const struct i3g4250d_device_config *config = dev->config;
61 	uint8_t buffer_tx[2] = { reg | I3G4250D_SPI_WRITEM, 0 };
62 	const struct spi_buf tx_buf[2] = {
63 		{
64 			.buf = buffer_tx,
65 			.len = 1,
66 		},
67 		{
68 			.buf = data,
69 			.len = len,
70 		}
71 	};
72 	const struct spi_buf_set tx = {
73 		.buffers = tx_buf,
74 		.count = 2,
75 	};
76 
77 	ret = spi_write_dt(&config->spi, &tx);
78 	if (ret < 0) {
79 		return ret;
80 	}
81 
82 	return 0;
83 }
84 
85 stmdev_ctx_t i3g4250d_spi_ctx = {
86 	.read_reg = (stmdev_read_ptr) i3g4250d_spi_read,
87 	.write_reg = (stmdev_write_ptr) i3g4250d_spi_write,
88 	.mdelay = (stmdev_mdelay_ptr) stmemsc_mdelay,
89 };
90 
i3g4250d_spi_init(const struct device * dev)91 int i3g4250d_spi_init(const struct device *dev)
92 {
93 	struct i3g4250d_data *i3g4250d = dev->data;
94 	const struct i3g4250d_device_config *cfg = dev->config;
95 
96 	if (!spi_is_ready_dt(&cfg->spi)) {
97 		LOG_ERR("spi not ready");
98 		return -ENODEV;
99 	}
100 
101 	i3g4250d->ctx = &i3g4250d_spi_ctx;
102 	i3g4250d->ctx->handle = (void *)dev;
103 
104 	return 0;
105 }
106 
107 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
108