1# ETH_MCUX Ethernet driver configuration options 2 3# Copyright (c) 2016-2017 ARM Ltd 4# SPDX-License-Identifier: Apache-2.0 5 6menuconfig ETH_MCUX 7 bool "MCUX Ethernet driver" 8 default y 9 depends on DT_HAS_NXP_KINETIS_ETHERNET_ENABLED 10 select NOCACHE_MEMORY if HAS_MCUX_CACHE && CPU_HAS_DCACHE 11 select ARM_MPU if CPU_CORTEX_M7 12 select NET_POWER_MANAGEMENT if PM_DEVICE 13 help 14 Enable MCUX Ethernet driver. Note, this driver performs one shot PHY 15 setup. There is no support for PHY disconnect, reconnect or 16 configuration change. 17 18if ETH_MCUX 19 20config ETH_MCUX_USE_DTCM_FOR_DMA_BUFFER 21 bool "Use DTCM for hardware DMA buffers" 22 default y 23 help 24 Place the hardware DMA buffers into DTCM for better networking 25 performance 26 27config ETH_MCUX_PROMISCUOUS_MODE 28 bool "Promiscuous mode" 29 help 30 Place the Ethernet receiver in promiscuous mode. This may be useful 31 for debugging and not needed for normal work. 32 33config ETH_MCUX_RMII_EXT_CLK 34 bool "RMII clock from external sources" 35 help 36 Setting this option will configure MCUX clock block to feed RMII 37 reference clock from external source (ENET_1588_CLKIN) 38 39config ETH_MCUX_NO_PHY_SMI 40 bool "Do not use SMI for PHY communication" 41 help 42 Some PHY devices, with DSA capabilities do not use SMI for 43 communication with MAC ENET controller. Other busses - like SPI 44 or I2C are used instead. 45 46config ETH_MCUX_PHY_TICK_MS 47 int "PHY poll period (ms)" 48 default 1000 49 range 100 30000 50 help 51 Set the PHY status polling period. 52 53config ETH_MCUX_PHY_EXTRA_DEBUG 54 bool "Additional detailed PHY debug" 55 help 56 Enable additional PHY related debug information related to 57 PHY status polling. 58 59config ETH_MCUX_RX_BUFFERS 60 int "Number of MCUX RX buffers" 61 default 6 62 range 6 16 63 help 64 Set the number of RX buffers provided to the MCUX driver. 65 66config ETH_MCUX_PHY_RESET 67 bool "Reset the PHY at boot" 68 help 69 Reset the ethernet PHY at boot. Requires dts properties int-gpios and 70 reset-gpios to be present. 71 72config ETH_MCUX_TX_BUFFERS 73 int "Number of MCUX TX buffers" 74 default 1 75 range 1 16 76 help 77 Set the number of TX buffers provided to the MCUX driver. 78 79config ETH_MCUX_HW_ACCELERATION 80 bool "Hardware acceleration" 81 help 82 Enable hardware acceleration for the following: 83 - IPv4, UDP and TCP checksum (both Rx and Tx) 84 85config PTP_CLOCK_MCUX 86 bool "MCUX PTP clock driver support" 87 default y 88 depends on PTP_CLOCK || NET_L2_PTP 89 help 90 Enable MCUX PTP clock support. 91 92if PTP_CLOCK_MCUX 93 94config ETH_MCUX_PTP_CLOCK_SRC_HZ 95 int "Frequency of the clock source for the PTP timer" 96 default 50000000 if SOC_SERIES_KINETIS_K6X 97 default 50000000 if SOC_SERIES_IMX_RT10XX 98 default 24000000 if SOC_SERIES_IMX_RT11XX 99 help 100 Set the frequency in Hz sourced to the PTP timer. 101 If the value is set properly, the timer will be accurate. 102 103config ETH_MCUX_PTP_CLOCK_INIT_PRIO 104 int 105 default 85 106 help 107 MCUX PTP Clock initialization priority level. There is 108 a dependency from the network stack that this device 109 initializes before network stack (NET_INIT_PRIO). 110 111endif # PTP_CLOCK_MCUX 112 113endif # ETH_MCUX 114