1/*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include "vmu_rt1170-pinctrl.dtsi"
8
9/ {
10	aliases {
11		led0 = &green_led;
12		led1 = &red_led;
13		led2 = &blue_led;
14		sdhc0 = &usdhc1;
15	};
16
17	leds {
18		compatible = "gpio-leds";
19		green_led: led-1 {
20			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
21			label = "Green LED";
22		};
23
24		red_led: led-2 {
25			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
26			label = "Red LED";
27		};
28
29		blue_led: led-3 {
30			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
31			label = "Blue LED";
32		};
33	};
34};
35
36&semc {
37	status = "disabled";
38};
39
40&lpuart1 {
41	status = "okay";
42	pinctrl-0 = <&pinmux_lpuart1>;
43	pinctrl-names = "default";
44	current-speed = <115200>;
45};
46
47&lpuart3 {
48	status = "okay";
49	pinctrl-0 = <&pinmux_lpuart3>;
50	pinctrl-names = "default";
51	current-speed = <115200>;
52};
53
54&lpuart4 {
55	status = "okay";
56	pinctrl-0 = <&pinmux_lpuart4>;
57	pinctrl-names = "default";
58	current-speed = <115200>;
59};
60
61&lpuart5 {
62	status = "okay";
63	pinctrl-0 = <&pinmux_lpuart5>;
64	pinctrl-names = "default";
65	current-speed = <115200>;
66};
67
68&lpuart6 {
69	status = "okay";
70	pinctrl-0 = <&pinmux_lpuart6>;
71	pinctrl-names = "default";
72	current-speed = <115200>;
73};
74
75&lpuart8 {
76	status = "okay";
77	pinctrl-0 = <&pinmux_lpuart8>;
78	pinctrl-names = "default";
79	current-speed = <115200>;
80};
81
82&lpuart10 {
83	status = "okay";
84	pinctrl-0 = <&pinmux_lpuart10>;
85	pinctrl-names = "default";
86	current-speed = <115200>;
87};
88
89&lpuart11 {
90	status = "okay";
91	pinctrl-0 = <&pinmux_lpuart11>;
92	pinctrl-names = "default";
93	current-speed = <115200>;
94};
95
96&green_led {
97	status = "okay";
98};
99
100&enet1g {
101	pinctrl-0 = <&pinmux_enet>;
102	pinctrl-names = "default";
103};
104
105&flexcan1 {
106	pinctrl-0 = <&pinmux_flexcan1>;
107	pinctrl-names = "default";
108};
109
110&flexcan2 {
111	pinctrl-0 = <&pinmux_flexcan2>;
112	pinctrl-names = "default";
113};
114
115&flexcan3 {
116	pinctrl-0 = <&pinmux_flexcan3>;
117	pinctrl-names = "default";
118};
119
120&lpi2c1 {
121	pinctrl-0 =<&pinmux_lpi2c1>;
122	pinctrl-names = "default";
123};
124
125&lpi2c2 {
126	pinctrl-0 =<&pinmux_lpi2c2>;
127	pinctrl-names = "default";
128};
129
130&lpi2c3 {
131	pinctrl-0 =<&pinmux_lpi2c3>;
132	pinctrl-names = "default";
133};
134
135&lpi2c6 {
136	pinctrl-0 =<&pinmux_lpi2c6>;
137	pinctrl-names = "default";
138};
139
140&lpspi1 {
141	pinctrl-0 = <&pinmux_lpspi1>;
142	pinctrl-names = "default";
143};
144
145&lpspi2 {
146	pinctrl-0 = <&pinmux_lpspi2>;
147	pinctrl-names = "default";
148};
149
150&lpspi3 {
151	pinctrl-0 = <&pinmux_lpspi3>;
152	pinctrl-names = "default";
153};
154
155&lpspi6 {
156	pinctrl-0 = <&pinmux_lpspi6>;
157	pinctrl-names = "default";
158};
159
160&lpadc1 {
161	pinctrl-0 = <&pinmux_lpadc1>;
162	pinctrl-names = "default";
163};
164
165&flexspi {
166	pinctrl-0 = <&pinmux_flexspi1>;
167	pinctrl-names = "default";
168};
169
170&usdhc1 {
171	pinctrl-0 = <&pinmux_usdhc1>;
172	pinctrl-names = "default";
173};
174
175&flexspi {
176	status = "okay";
177	ahb-prefetch;
178	ahb-read-addr-opt;
179	rx-clock-source = <1>;
180	reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(16)>;
181	mx25um51345g: mx25um51345g@0 {
182		compatible = "nxp,imx-flexspi-mx25um51345g";
183		/* MX25UM51245G is 64MB, 512MBit flash part */
184		size = <DT_SIZE_M(64 * 8)>;
185		reg = <0>;
186		spi-max-frequency = <200000000>;
187		status = "okay";
188		jedec-id = [c2 81 3a];
189		erase-block-size = <4096>;
190		write-block-size = <16>;
191
192		partitions {
193			compatible = "fixed-partitions";
194			#address-cells = <1>;
195			#size-cells = <1>;
196
197			boot_partition: partition@0 {
198				label = "mcuboot";
199				reg = <0x00000000 DT_SIZE_K(128)>;
200			};
201			slot0_partition: partition@20000 {
202				label = "image-0";
203				reg = <0x00020000 DT_SIZE_K(3076)>;
204			};
205			slot1_partition: partition@321000 {
206				label = "image-1";
207				reg = <0x00321000 DT_SIZE_K(3072)>;
208			};
209			storage_partition: partition@621000 {
210				label = "storage";
211				reg = <0x00621000 DT_SIZE_M(57)>;
212			};
213		};
214	};
215};
216