1/*
2 * PAN1780 EVB configuration
3 *
4 * Copyright (c) 2022 Panasonic Industrial Devices Europe GmbH
5 * SPDX-License-Identifier: Apache-2.0
6 */
7&pinctrl {
8	uart0_default: uart0_default {
9		group1 {
10			psels = <NRF_PSEL(UART_TX, 0, 6)>,
11				<NRF_PSEL(UART_RTS, 0, 5)>;
12		};
13		group2 {
14			psels = <NRF_PSEL(UART_RX, 0, 8)>,
15				<NRF_PSEL(UART_CTS, 0, 7)>;
16			bias-pull-up;
17		};
18	};
19
20	uart0_sleep: uart0_sleep {
21		group1 {
22			psels = <NRF_PSEL(UART_TX, 0, 6)>,
23				<NRF_PSEL(UART_RX, 0, 8)>,
24				<NRF_PSEL(UART_RTS, 0, 5)>,
25				<NRF_PSEL(UART_CTS, 0, 7)>;
26			low-power-enable;
27		};
28	};
29
30	uart1_default: uart1_default {
31		group1 {
32			psels = <NRF_PSEL(UART_RX, 1, 1)>;
33			bias-pull-up;
34		};
35		group2 {
36			psels = <NRF_PSEL(UART_TX, 1, 2)>;
37		};
38	};
39
40	uart1_sleep: uart1_sleep {
41		group1 {
42			psels = <NRF_PSEL(UART_RX, 1, 1)>,
43				<NRF_PSEL(UART_TX, 1, 2)>;
44			low-power-enable;
45		};
46	};
47
48	i2c0_default: i2c0_default {
49		group1 {
50			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
51				<NRF_PSEL(TWIM_SCL, 0, 27)>;
52		};
53	};
54
55	i2c0_sleep: i2c0_sleep {
56		group1 {
57			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
58				<NRF_PSEL(TWIM_SCL, 0, 27)>;
59			low-power-enable;
60		};
61	};
62
63	i2c1_default: i2c1_default {
64		group1 {
65			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
66				<NRF_PSEL(TWIM_SCL, 0, 31)>;
67		};
68	};
69
70	i2c1_sleep: i2c1_sleep {
71		group1 {
72			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
73				<NRF_PSEL(TWIM_SCL, 0, 31)>;
74			low-power-enable;
75		};
76	};
77
78	pwm0_default: pwm0_default {
79		group1 {
80			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
81			nordic,invert;
82		};
83	};
84
85	pwm0_sleep: pwm0_sleep {
86		group1 {
87			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
88			low-power-enable;
89		};
90	};
91
92	spi0_default: spi0_default {
93		group1 {
94			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
95				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
96				<NRF_PSEL(SPIM_MISO, 0, 29)>;
97		};
98	};
99
100	spi0_sleep: spi0_sleep {
101		group1 {
102			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
103				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
104				<NRF_PSEL(SPIM_MISO, 0, 29)>;
105			low-power-enable;
106		};
107	};
108
109	spi1_default: spi1_default {
110		group1 {
111			psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
112				<NRF_PSEL(SPIM_MOSI, 0, 30)>,
113				<NRF_PSEL(SPIM_MISO, 1, 8)>;
114		};
115	};
116
117	spi1_sleep: spi1_sleep {
118		group1 {
119			psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
120				<NRF_PSEL(SPIM_MOSI, 0, 30)>,
121				<NRF_PSEL(SPIM_MISO, 1, 8)>;
122			low-power-enable;
123		};
124	};
125
126	spi2_default: spi2_default {
127		group1 {
128			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
129				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
130				<NRF_PSEL(SPIM_MISO, 0, 21)>;
131		};
132	};
133
134	spi2_sleep: spi2_sleep {
135		group1 {
136			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
137				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
138				<NRF_PSEL(SPIM_MISO, 0, 21)>;
139			low-power-enable;
140		};
141	};
142
143	qspi_default: qspi_default {
144		group1 {
145			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
146				<NRF_PSEL(QSPI_IO0, 0, 20)>,
147				<NRF_PSEL(QSPI_IO1, 0, 21)>,
148				<NRF_PSEL(QSPI_IO2, 0, 22)>,
149				<NRF_PSEL(QSPI_IO3, 0, 23)>,
150				<NRF_PSEL(QSPI_CSN, 0, 17)>;
151		};
152	};
153
154	qspi_sleep: qspi_sleep {
155		group1 {
156			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
157				<NRF_PSEL(QSPI_IO0, 0, 20)>,
158				<NRF_PSEL(QSPI_IO1, 0, 21)>,
159				<NRF_PSEL(QSPI_IO2, 0, 22)>,
160				<NRF_PSEL(QSPI_IO3, 0, 23)>,
161				<NRF_PSEL(QSPI_CSN, 0, 17)>;
162			low-power-enable;
163		};
164	};
165
166	spi3_default: spi3_default {
167		group1 {
168			psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
169				<NRF_PSEL(SPIM_MISO, 0, 14)>,
170				<NRF_PSEL(SPIM_MOSI, 0, 13)>;
171		};
172	};
173
174	spi3_sleep: spi3_sleep {
175		group1 {
176			psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
177				<NRF_PSEL(SPIM_MISO, 0, 14)>,
178				<NRF_PSEL(SPIM_MOSI, 0, 13)>;
179			low-power-enable;
180		};
181	};
182
183};
184