1/*
2 * PAN1770 EVB configuration
3 *
4 * Copyright (c) 2022 Panasonic Industrial Devices Europe GmbH
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8&pinctrl {
9	uart0_default: uart0_default {
10		group1 {
11			psels = <NRF_PSEL(UART_TX, 0, 6)>,
12				<NRF_PSEL(UART_RTS, 0, 5)>;
13		};
14		group2 {
15			psels = <NRF_PSEL(UART_RX, 0, 8)>,
16				<NRF_PSEL(UART_CTS, 0, 7)>;
17			bias-pull-up;
18		};
19	};
20
21	uart0_sleep: uart0_sleep {
22		group1 {
23			psels = <NRF_PSEL(UART_TX, 0, 6)>,
24				<NRF_PSEL(UART_RX, 0, 8)>,
25				<NRF_PSEL(UART_RTS, 0, 5)>,
26				<NRF_PSEL(UART_CTS, 0, 7)>;
27			low-power-enable;
28		};
29	};
30
31	uart1_default: uart1_default {
32		group1 {
33			psels = <NRF_PSEL(UART_RX, 1, 1)>;
34			bias-pull-up;
35		};
36		group2 {
37			psels = <NRF_PSEL(UART_TX, 1, 2)>;
38		};
39	};
40
41	uart1_sleep: uart1_sleep {
42		group1 {
43			psels = <NRF_PSEL(UART_RX, 1, 1)>,
44				<NRF_PSEL(UART_TX, 1, 2)>;
45			low-power-enable;
46		};
47	};
48
49	i2c0_default: i2c0_default {
50		group1 {
51			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
52				<NRF_PSEL(TWIM_SCL, 0, 27)>;
53		};
54	};
55
56	i2c0_sleep: i2c0_sleep {
57		group1 {
58			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
59				<NRF_PSEL(TWIM_SCL, 0, 27)>;
60			low-power-enable;
61		};
62	};
63
64	i2c1_default: i2c1_default {
65		group1 {
66			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
67				<NRF_PSEL(TWIM_SCL, 0, 31)>;
68		};
69	};
70
71	i2c1_sleep: i2c1_sleep {
72		group1 {
73			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
74				<NRF_PSEL(TWIM_SCL, 0, 31)>;
75			low-power-enable;
76		};
77	};
78
79	pwm0_default: pwm0_default {
80		group1 {
81			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
82			nordic,invert;
83		};
84	};
85
86	pwm0_sleep: pwm0_sleep {
87		group1 {
88			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
89			low-power-enable;
90		};
91	};
92
93	spi0_default: spi0_default {
94		group1 {
95			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
96				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
97				<NRF_PSEL(SPIM_MISO, 0, 29)>;
98		};
99	};
100
101	spi0_sleep: spi0_sleep {
102		group1 {
103			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
104				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
105				<NRF_PSEL(SPIM_MISO, 0, 29)>;
106			low-power-enable;
107		};
108	};
109
110	spi1_default: spi1_default {
111		group1 {
112			psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
113				<NRF_PSEL(SPIM_MOSI, 0, 30)>,
114				<NRF_PSEL(SPIM_MISO, 1, 8)>;
115		};
116	};
117
118	spi1_sleep: spi1_sleep {
119		group1 {
120			psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
121				<NRF_PSEL(SPIM_MOSI, 0, 30)>,
122				<NRF_PSEL(SPIM_MISO, 1, 8)>;
123			low-power-enable;
124		};
125	};
126
127	spi2_default: spi2_default {
128		group1 {
129			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
130				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
131				<NRF_PSEL(SPIM_MISO, 0, 21)>;
132		};
133	};
134
135	spi2_sleep: spi2_sleep {
136		group1 {
137			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
138				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
139				<NRF_PSEL(SPIM_MISO, 0, 21)>;
140			low-power-enable;
141		};
142	};
143
144	qspi_default: qspi_default {
145		group1 {
146			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
147				<NRF_PSEL(QSPI_IO0, 0, 20)>,
148				<NRF_PSEL(QSPI_IO1, 0, 21)>,
149				<NRF_PSEL(QSPI_IO2, 0, 22)>,
150				<NRF_PSEL(QSPI_IO3, 0, 23)>,
151				<NRF_PSEL(QSPI_CSN, 0, 17)>;
152		};
153	};
154
155	qspi_sleep: qspi_sleep {
156		group1 {
157			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
158				<NRF_PSEL(QSPI_IO0, 0, 20)>,
159				<NRF_PSEL(QSPI_IO1, 0, 21)>,
160				<NRF_PSEL(QSPI_IO2, 0, 22)>,
161				<NRF_PSEL(QSPI_IO3, 0, 23)>,
162				<NRF_PSEL(QSPI_CSN, 0, 17)>;
163			low-power-enable;
164		};
165	};
166
167	spi3_default: spi3_default {
168		group1 {
169			psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
170				<NRF_PSEL(SPIM_MISO, 0, 14)>,
171				<NRF_PSEL(SPIM_MOSI, 0, 13)>;
172		};
173	};
174
175	spi3_sleep: spi3_sleep {
176		group1 {
177			psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
178				<NRF_PSEL(SPIM_MISO, 0, 14)>,
179				<NRF_PSEL(SPIM_MOSI, 0, 13)>;
180			low-power-enable;
181		};
182	};
183
184};
185