1.. _nucleo_wb55rg_board:
2
3ST Nucleo WB55RG
4################
5
6Overview
7********
8
9The Nucleo WB55RG board is a multi-protocol wireless and ultra-low-power device
10embedding a powerful and ultra-low-power radio compliant with the Bluetooth®
11Low Energy (BLE) SIG specification v5.0 and with IEEE 802.15.4-2011.
12
13
14- STM32 microcontroller in VFQFPN68 package
15- 2.4 GHz RF transceiver supporting Bluetooth® specification v5.0 and
16  IEEE 802.15.4-2011 PHY and MAC
17- Dedicated Arm® 32-bit Cortex® M0+ CPU for real-time Radio layer
18- Three user LEDs
19- Board connector: USB user with Micro-B
20- Two types of extension resources:
21
22  - Arduino Uno V3 connectivity
23  - ST morpho extension pin headers for full access to all STM32 I/Os
24
25- Integrated PCB antenna or footprint for SMA connector
26- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
27- Flexible power-supply options: ST-LINK USB VBUS or external sources
28- On-board socket for CR2032 battery
29- On-board ST-LINK/V2-1 debugger/programmer with USB re- enumeration capability:
30  mass storage, virtual COM port and debug port
31
32.. image:: img/nucleowb55rg.jpg
33   :align: center
34   :alt: Nucleo WB55RG
35
36More information about the board can be found at the `Nucleo WB55RG website`_.
37
38Hardware
39********
40
41STM32WB55RG is an ultra-low-power dual core Arm Cortex-M4 MCU 64 MHz,Cortex-M0 32MHz
42with 1 Mbyte of Flash memory, Bluetooth 5, 802.15.4, USB, LCD, AES-256 SoC and
43provides the following hardware capabilities:
44
45- Ultra-low-power with FlexPowerControl (down to 600 nA Standby mode with RTC and 32KB RAM)
46- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 64 MHz
47- Radio:
48
49  - 2.4GHz
50  - RF transceiver supporting Bluetooth® 5 specification, IEEE 802.15.4-2011 PHY and MAC,
51    supporting Thread and ZigBee|reg| 3.0
52  - RX Sensitivity: -96 dBm (Bluetooth|reg| Low Energy at 1 Mbps), -100 dBm (802.15.4)
53  - Programmable output power up to +6 dBm with 1 dB steps
54  - Integrated balun to reduce BOM
55  - Support for 2 Mbps
56  - Dedicated Arm|reg| 32-bit Cortex|reg| M0 + CPU for real-time Radio layer
57  - Accurate RSSI to enable power control
58  - Suitable for systems requiring compliance with radio frequency regulations
59    ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
60  - Support for external PA
61
62- Clock Sources:
63
64  - 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
65  - 32 kHz crystal oscillator for RTC (LSE)
66  - 2x Internal low-power 32 kHz RC (|plusminus| 5% and |plusminus| 500ppm)
67  - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
68    LSE (better than  |plusminus| 0.25 % accuracy)
69  - 2 PLLs for system clock, USB, SAI and ADC
70
71- RTC with HW calendar, alarms and calibration
72- LCD 8 x 40 or 4 x 44 with step-up converter
73- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
74- 16x timers:
75
76  - 2x 16-bit advanced motor-control
77  - 2x 32-bit and 5x 16-bit general purpose
78  - 2x 16-bit basic
79  - 2x low-power 16-bit timers (available in Stop mode)
80  - 2x watchdogs
81  - SysTick timer
82
83- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
84- Memories
85
86  - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
87  - Up to 320 KB of SRAM including 64 KB with hardware parity check
88  - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
89  - Quad SPI memory interface
90
91- 4x digital filters for sigma delta modulator
92- Rich analog peripherals (down to 1.62 V)
93
94  - 12-bit ADC 4.26Msps, up to 16-bit with hardware oversampling, 200 uA/Msps
95  - 2x ultra-low-power comparator
96  - Accurate 2.5 V or 2.048 V reference voltage buffered output
97
98- System peripherals
99
100  - Inter processor communication controller (IPCC) for communication with
101    Bluetooth|reg| Low Energy and 802.15.4
102  - HW semaphores for resources sharing between CPUs
103  - 2x DMA controllers (7x channels each) supporting ADC, SPI, I2C, USART,
104    QSPI, SAI, AES, Timers
105  - 1x USART (ISO 7816, IrDA, SPI Master, Modbus and Smartcard mode)
106  - 1x LPUART (low power)
107  - 2x SPI 32 Mbit/s
108  - 2x I2C (SMBus/PMBus)
109  - 1x SAI (dual channel high quality audio)
110  - 1x USB 2.0 FS device, crystal-less, BCD and LPM
111  - Touch sensing controller, up to 18 sensors
112  - LCD 8x40 with step-up converter
113  - 1x 16-bit, four channels advanced timer
114  - 2x 16-bits, two channels timer
115  - 1x 32-bits, four channels timer
116  - 2x 16-bits ultra-low-power timer
117  - 1x independent Systick
118  - 1x independent watchdog
119  - 1x window watchdog
120
121- Security and ID
122
123 - 3x hardware encryption AES maximum 256-bit for the application,
124   the Bluetooth|reg| Low Energy and IEEE802.15.4
125 - Customer key storage / key manager services
126 - HW public key authority (PKA)
127 - Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
128 - True random number generator (RNG)
129 - Sector protection against R/W operation (PCROP)
130 - CRC calculation unit
131 - 96-bit unique ID
132 - 64-bit unique ID. Possibility to derive 802.15.5 64-bit and
133   Bluetooth|reg| Low Energy 48-bit EUI
134
135- Up to 72 fast I/Os, 70 of them 5 V-tolerant
136- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
137
138
139More information about STM32WB55RG can be found here:
140
141- `STM32WB55RG on www.st.com`_
142- `STM32WB5RG datasheet`_
143- `STM32WB5RG reference manual`_
144
145Supported Features
146==================
147
148The Zephyr nucleo_wb55rg board configuration supports the following hardware features:
149
150+-----------+------------+-------------------------------------+
151| Interface | Controller | Driver/Component                    |
152+===========+============+=====================================+
153| NVIC      | on-chip    | nested vector interrupt controller  |
154+-----------+------------+-------------------------------------+
155| UART      | on-chip    | serial port-polling;                |
156|           |            | serial port-interrupt               |
157+-----------+------------+-------------------------------------+
158| PINMUX    | on-chip    | pinmux                              |
159+-----------+------------+-------------------------------------+
160| GPIO      | on-chip    | gpio                                |
161+-----------+------------+-------------------------------------+
162| I2C       | on-chip    | i2c                                 |
163+-----------+------------+-------------------------------------+
164| SPI       | on-chip    | spi                                 |
165+-----------+------------+-------------------------------------+
166| PWM       | on-chip    | pwm                                 |
167+-----------+------------+-------------------------------------+
168| ADC       | on-chip    | adc                                 |
169+-----------+------------+-------------------------------------+
170| WATCHDOG  | on-chip    | independent watchdog                |
171+-----------+------------+-------------------------------------+
172| RADIO     | on-chip    | Bluetooth Low Energy                |
173+-----------+------------+-------------------------------------+
174| die-temp  | on-chip    | die temperature sensor              |
175+-----------+------------+-------------------------------------+
176
177Other hardware features are not yet supported on this Zephyr port.
178
179The default configuration can be found in the defconfig file:
180``boards/arm/nucleo_wb55rg/nucleo_wb55rg_defconfig``
181
182Bluetooth and compatibility with STM32WB Copro Wireless Binaries
183================================================================
184
185To operate bluetooth on Nucleo WB55RG, Cortex-M0 core should be flashed with
186a valid STM32WB Coprocessor binaries (either 'Full stack' or 'HCI Layer').
187These binaries are delivered in STM32WB Cube packages, under
188Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/
189For compatibility information with the various versions of these binaries,
190please check `modules/hal/stm32/lib/stm32wb/hci/README <https://github.com/zephyrproject-rtos/hal_stm32/blob/main/lib/stm32wb/hci/README>`__
191in the hal_stm32 repo.
192Note that since STM32WB Cube package V1.13.2, "full stack" binaries are not compatible
193anymore for a use in Zephyr and only "HCI Only" versions should be used on the M0
194side.
195
196Connections and IOs
197===================
198
199Nucleo WB55RG Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
200input/output, pull-up, etc.
201
202Default Zephyr Peripheral Mapping:
203----------------------------------
204
205.. rst-class:: rst-columns
206
207- UART_1 TX/RX : PB7/PB6
208- LPUART_1 TX/RX : PA3/PA2 (arduino_serial)
209- I2C_1_SCL : PB8
210- I2C_1_SDA : PB9
211- I2C_3_SCL : PC0
212- I2C_3_SDA : PC1
213- USER_PB : PC4
214- USER_PB1 : PD0
215- USER_PB2 : PD1
216- LD1 : PB5
217- LD2 : PB0
218- LD3 : PB1
219- SPI_1_NSS : PA4 (arduino_spi)
220- SPI_1_SCK : PA5 (arduino_spi)
221- SPI_1_MISO : PA6 (arduino_spi)
222- SPI_1_MOSI : PA7 (arduino_spi)
223- PWM_2 CH 1 : PA0
224- ADC_1_CH3 : PC2
225
226System Clock
227------------
228
229Nucleo WB55RG System Clock could be driven by internal or external oscillator,
230as well as main PLL clock. By default System clock is driven by HSE clock at 32MHz.
231
232Serial Port
233-----------
234
235Nucleo WB55RG board has 2 (LP)U(S)ARTs. The Zephyr console output is assigned to USART1.
236Default settings are 115200 8N1.
237
238
239Programming and Debugging
240*************************
241
242Applications for the ``nucleo_wb55rg`` board configuration can be built the
243usual way (see :ref:`build_an_application`).
244
245Flashing
246========
247
248Nucleo WB55RG board includes an ST-LINK/V2-1 embedded debug tool
249interface.  This interface is supported by the openocd version included in the
250Zephyr SDK since v0.11.0.
251
252If you prefer, you can use pyocd, but it requires to enable "pack" support with
253the following pyocd command:
254
255.. code-block:: console
256
257   $ pyocd pack --update
258   $ pyocd pack --install stm32wb55rg
259
260
261Flashing an application to Nucleo WB55RG
262----------------------------------------
263
264Connect the Nucleo WB55RG to your host computer using the USB port.
265Then build and flash an application. Here is an example for the
266:ref:`hello_world` application.
267
268Run a serial host program to connect with your Nucleo board:
269
270.. code-block:: console
271
272   $ minicom -D /dev/ttyUSB0
273
274Then build and flash the application.
275
276.. zephyr-app-commands::
277   :zephyr-app: samples/hello_world
278   :board: nucleo_wb55rg
279   :goals: build flash
280
281You should see the following message on the console:
282
283.. code-block:: console
284
285   Hello World! arm
286
287Debugging
288=========
289
290You can debug an application in the usual way.  Here is an example for the
291:zephyr:code-sample:`blinky` application.
292
293.. zephyr-app-commands::
294   :zephyr-app: samples/basic/blinky
295   :board: nucleo_wb55rg
296   :maybe-skip-config:
297   :goals: debug
298
299.. _Nucleo WB55RG website:
300   https://www.st.com/en/evaluation-tools/p-nucleo-wb55.html
301
302.. _STM32WB55RG on www.st.com:
303   https://www.st.com/en/microcontrollers-microprocessors/stm32wb55rg.html
304
305.. _STM32WB5RG datasheet:
306   https://www.st.com/resource/en/datasheet/stm32wb55rg.pdf
307
308.. _STM32WB5RG reference manual:
309   https://www.st.com/resource/en/reference_manual/dm00318631.pdf
310