1.. _nucleo_l496zg_board: 2 3ST Nucleo L496ZG 4################ 5 6Overview 7******** 8 9The Nucleo L496ZG board features an ARM Cortex-M4 based STM32L496ZG MCU 10with a wide range of connectivity support and configurations. Here are 11some highlights of the Nucleo L476ZG board: 12 13 14- STM32 microcontroller in QFP144 package 15- USB OTG FS with Micro-AB connector 16- Two types of extension resources: 17 18 - Arduino Uno V3 connectivity 19 - ST morpho extension pin headers for full access to all STM32 I/Os 20 21- On-board ST-LINK/V2-1 debugger/programmer with SWD connector 22- Flexible board power supply: 23 24 - USB VBUS or external source(3.3V, 5V, 7 - 12V) 25 - Power management access point 26 27- 8 LEDs: user LEDs (LD1, LD2, LD3), communication LED (LD4), USB 28 power fault(LD5), power LED (LD6), USB FS OTG (LD7, LD8) 29- 2 push buttons: USER and RESET 30 31.. image:: img/nucleo_l496zg.jpg 32 :align: center 33 :alt: Nucleo L496ZG 34 35More information about the board can be found at the `Nucleo L496ZG website`_. 36 37Hardware 38******** 39 40The STM32L496ZG SoC provides the following hardware capabilities: 41 42- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 91 uA/MHz run mode) 43- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1) 44- Clock Sources: 45 46 - 4 to 48 MHz crystal oscillator 47 - 32 kHz crystal oscillator for RTC (LSE) 48 - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) 49 - Internal low-power 32 kHz RC ( |plusminus| 5%) 50 - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by 51 LSE (better than |plusminus| 0.25 % accuracy) 52 - 3 PLLs for system clock, USB, audio, ADC 53 54- RTC with HW calendar, alarms and calibration 55- LCD 8 x 40 or 4 x 44 with step-up converter 56- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors 57- 16x timers: 58 59 - 2x 16-bit advanced motor-control 60 - 2x 32-bit and 5x 16-bit general purpose 61 - 2x 16-bit basic 62 - 2x low-power 16-bit timers (available in Stop mode) 63 - 2x watchdogs 64 - SysTick timer 65 66- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V 67- Memories 68 69 - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection 70 - Up to 320 KB of SRAM including 64 KB with hardware parity check 71 - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories 72 - Quad SPI memory interface 73 74- 4x digital filters for sigma delta modulator 75- Rich analog peripherals (independent supply) 76 77 - 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS 78 - 2x 12-bit DAC, low-power sample and hold 79 - 2x operational amplifiers with built-in PGA 80 - 2x ultra-low-power comparators 81 82- 20x communication interfaces 83 84 - USB OTG 2.0 full-speed, LPM and BCD 85 - 2x SAIs (serial audio interface) 86 - 4x I2C FM+(1 Mbit/s), SMBus/PMBus 87 - 5x U(S)ARTs (ISO 7816, LIN, IrDA, modem) 88 - 1x LPUART 89 - 3x SPIs (4x SPIs with the Quad SPI) 90 - 2x CAN (2.0B Active) and SDMMC interface 91 - SWPMI single wire protocol master I/F 92 - IRTIM (Infrared interface) 93 94- 14-channel DMA controller 95- True random number generator 96- CRC calculation unit, 96-bit unique ID 97- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| 98 99 100More information about STM32L496ZG can be found here: 101 102- `STM32L496ZG on www.st.com`_ 103- `STM32L496 reference manual`_ 104 105Supported Features 106================== 107 108The Zephyr nucleo_l496zg board configuration supports the following hardware features: 109 110+-----------+------------+-------------------------------------+ 111| Interface | Controller | Driver/Component | 112+===========+============+=====================================+ 113| NVIC | on-chip | nested vector interrupt controller | 114+-----------+------------+-------------------------------------+ 115| UART | on-chip | serial port-polling; | 116| | | serial port-interrupt | 117+-----------+------------+-------------------------------------+ 118| PINMUX | on-chip | pinmux | 119+-----------+------------+-------------------------------------+ 120| GPIO | on-chip | gpio | 121+-----------+------------+-------------------------------------+ 122| I2C | on-chip | i2c | 123+-----------+------------+-------------------------------------+ 124| SPI | on-chip | spi | 125+-----------+------------+-------------------------------------+ 126| PWM | on-chip | pwm | 127+-----------+------------+-------------------------------------+ 128| RTC | on-chip | rtc | 129+-----------+------------+-------------------------------------+ 130| WATCHDOG | on-chip | System Window Watchdog | 131+-----------+------------+-------------------------------------+ 132 133Other hardware features are not yet supported on this Zephyr port. 134 135The default configuration can be found in the defconfig file: 136``boards/arm/nucleo_l496zg/nucleo_l496zg_defconfig`` 137 138 139Connections and IOs 140=================== 141 142Nucleo L496ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing, 143input/output, pull-up, etc. 144 145For mode details please refer to `STM32 Nucleo-144 board User Manual`_. 146 147Default Zephyr Peripheral Mapping: 148---------------------------------- 149 150- UART_2 TX/RX : PD5/PD6 151- UART_3 TX/RX : PD8/PD9 152- LPUART_1 TX/RX : PG7/PG8 153- PWM_1_CH1: PE9 154- PWM_1_CH2: PE11 155- PWM_1_CH3: PE13 156- PWM_2_CH1: PA0 157- I2C_1_SCL: PB8 158- I2C_1_SDA: PB7 159- SPI_1_NSS: PD14 160- SPI_1_SCK: PA5 161- SPI_1_MISO: PA6 162- SPI_1_MOSI: PA7 163- USER_PB : PC13 164- LD1 : PC7 165- LD2 : PB7 166- LD3 : PB14 167 168System Clock 169------------ 170 171Nucleo L496ZG System Clock could be driven by internal or external oscillator, 172as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz, 173driven by 16MHz high speed internal oscillator. 174 175Serial Port 176----------- 177 178Nucleo L496ZG board has 5 U(S)ARTs. The Zephyr console output is assigned to UART2. 179Default settings are 115200 8N1. 180 181 182Programming and Debugging 183************************* 184 185Applications for the ``nucleo_l496zg`` board configuration can be built and 186flashed in the usual way (see :ref:`build_an_application` and 187:ref:`application_run` for more details). 188 189Flashing 190======== 191 192Nucleo L496ZG board includes an ST-LINK/V2-1 embedded debug tool 193interface. This interface is supported by the openocd version 194included in the Zephyr SDK since v0.9.5. 195 196Flashing an application to Nucleo L496ZG 197---------------------------------------- 198 199Connect the Nucleo L496ZG to your host computer using the USB port. 200Then build and flash an application. Here is an example for the 201:ref:`hello_world` application. 202 203Run a serial host program to connect with your Nucleo board: 204 205.. code-block:: console 206 207 $ minicom -D /dev/ttyUSB0 208 209Then build and flash the application. 210 211.. zephyr-app-commands:: 212 :zephyr-app: samples/hello_world 213 :board: nucleo_l496zg 214 :goals: build flash 215 216You should see the following message on the console: 217 218.. code-block:: console 219 220 Hello World! arm 221 222Debugging 223========= 224 225You can debug an application in the usual way. Here is an example for the 226:ref:`hello_world` application. 227 228.. zephyr-app-commands:: 229 :zephyr-app: samples/hello_world 230 :board: nucleo_l496zg 231 :maybe-skip-config: 232 :goals: debug 233 234.. _Nucleo L496ZG website: 235 https://www.st.com/en/evaluation-tools/nucleo-l496zg.html 236 237.. _STM32 Nucleo-144 board User Manual: 238 https://www.st.com/resource/en/user_manual/dm00368330.pdf 239 240.. _STM32L496ZG on www.st.com: 241 https://www.st.com/en/microcontrollers/stm32l496zg.html 242 243.. _STM32L496 reference manual: 244 https://www.st.com/resource/en/reference_manual/dm00083560.pdf 245