1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by rt_cfg_utils.py
6 * from mm_swiftio.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1052dvl6b-pinctrl.dtsi>
10
11&pinctrl {
12	pinmux_csi: pinmux_csi {
13		group0 {
14			pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
15				<&iomuxc_gpio_ad_b1_05_csi_mclk>,
16				<&iomuxc_gpio_ad_b0_14_csi_vsync>,
17				<&iomuxc_gpio_ad_b0_15_csi_hsync>,
18				<&iomuxc_gpio_ad_b1_08_csi_data09>,
19				<&iomuxc_gpio_ad_b1_09_csi_data08>,
20				<&iomuxc_gpio_ad_b1_10_csi_data07>,
21				<&iomuxc_gpio_ad_b1_11_csi_data06>,
22				<&iomuxc_gpio_ad_b1_12_csi_data05>,
23				<&iomuxc_gpio_ad_b1_13_csi_data04>,
24				<&iomuxc_gpio_ad_b1_14_csi_data03>,
25				<&iomuxc_gpio_ad_b1_15_csi_data02>;
26			drive-strength = "r0-6";
27			slew-rate = "slow";
28			nxp,speed = "100-mhz";
29		};
30	};
31
32	pinmux_lpi2c1: pinmux_lpi2c1 {
33		group0 {
34			pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
35				<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
36			drive-strength = "r0-6";
37			drive-open-drain;
38			slew-rate = "slow";
39			nxp,speed = "100-mhz";
40			input-enable;
41		};
42	};
43
44	pinmux_lpi2c3: pinmux_lpi2c3 {
45		group0 {
46			pinmux = <&iomuxc_gpio_ad_b1_07_lpi2c3_scl>,
47				<&iomuxc_gpio_ad_b1_06_lpi2c3_sda>;
48			drive-strength = "r0-6";
49			drive-open-drain;
50			slew-rate = "slow";
51			nxp,speed = "100-mhz";
52		};
53	};
54
55	pinmux_lpuart1: pinmux_lpuart1 {
56		group0 {
57			pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
58				<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
59			drive-strength = "r0-6";
60			slew-rate = "slow";
61			nxp,speed = "100-mhz";
62		};
63	};
64
65	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
66		group0 {
67			pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
68			drive-strength = "r0-6";
69			bias-pull-up;
70			bias-pull-up-value = "100k";
71			slew-rate = "slow";
72			nxp,speed = "100-mhz";
73		};
74		group1 {
75			pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
76			drive-strength = "r0-6";
77			slew-rate = "slow";
78			nxp,speed = "100-mhz";
79		};
80	};
81
82	pinmux_usdhc1: pinmux_usdhc1 {
83		group0 {
84			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
85			bias-disable;
86			drive-strength = "r0";
87			input-schmitt-enable;
88			slew-rate = "fast";
89			nxp,speed = "100-mhz";
90		};
91		group1 {
92			pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
93				<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
94				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
95				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
96				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
97				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
98			drive-strength = "r0";
99			input-schmitt-enable;
100			bias-pull-up;
101			bias-pull-up-value = "47k";
102			slew-rate = "fast";
103			nxp,speed = "100-mhz";
104		};
105		group2 {
106			pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
107			drive-strength = "r0-4";
108			input-schmitt-enable;
109			bias-pull-up;
110			bias-pull-up-value = "47k";
111			slew-rate = "fast";
112			nxp,speed = "100-mhz";
113		};
114		group3 {
115			pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
116			drive-strength = "r0-6";
117			slew-rate = "slow";
118			nxp,speed = "100-mhz";
119		};
120	};
121
122	/* fast pinmux settings for USDHC (over 100 Mhz) */
123	pinmux_usdhc1_fast: pinmux_usdhc1_fast {
124		group0 {
125			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
126			bias-disable;
127			drive-strength = "r0-7";
128			input-schmitt-enable;
129			slew-rate = "fast";
130			nxp,speed = "200-mhz";
131		};
132		group1 {
133			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
134				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
135				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
136				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
137				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
138			drive-strength = "r0-7";
139			input-schmitt-enable;
140			bias-pull-up;
141			bias-pull-up-value = "47k";
142			slew-rate = "fast";
143			nxp,speed = "200-mhz";
144		};
145	};
146
147	/* medium pinmux settings for USDHC (under 100 Mhz) */
148	pinmux_usdhc1_med: pinmux_usdhc1_med {
149		group0 {
150			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
151			bias-disable;
152			drive-strength = "r0-7";
153			input-schmitt-enable;
154			slew-rate = "fast";
155			nxp,speed = "100-mhz";
156		};
157		group1 {
158			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
159				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
160				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
161				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
162				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
163			drive-strength = "r0-7";
164			input-schmitt-enable;
165			bias-pull-up;
166			bias-pull-up-value = "47k";
167			slew-rate = "fast";
168			nxp,speed = "100-mhz";
169		};
170	};
171
172	/* slow pinmux settings for USDHC (under 50 Mhz) */
173	pinmux_usdhc1_slow: pinmux_usdhc1_slow {
174		group0 {
175			pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
176			bias-disable;
177			drive-strength = "r0-7";
178			input-schmitt-enable;
179			slew-rate = "fast";
180			nxp,speed = "50-mhz";
181		};
182		group1 {
183			pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
184				<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
185				<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
186				<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
187				<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
188			drive-strength = "r0-7";
189			input-schmitt-enable;
190			bias-pull-up;
191			bias-pull-up-value = "47k";
192			slew-rate = "fast";
193			nxp,speed = "50-mhz";
194		};
195	};
196
197};
198
199