1/*
2 * Copyright (c) 2022, NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by rt_cfg_utils.py
6 * from mimxrt1010_evk.mex
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1011dae5a-pinctrl.dtsi>
10
11&pinctrl {
12	/* ADC Channels 1 and 2, exposed as pins 10 and 12 on J26 of EVK */
13	pinmux_adc1: pinmux_adc1 {
14		group0 {
15			pinmux = <&iomuxc_gpio_ad_01_adc1_in1>,
16				<&iomuxc_gpio_ad_02_adc1_in2>;
17			drive-strength = "r0-4";
18			slew-rate = "slow";
19			nxp,speed = "100-mhz";
20		};
21	};
22
23	pinmux_lpi2c1: pinmux_lpi2c1 {
24		group0 {
25			pinmux = <&iomuxc_gpio_01_lpi2c1_sda>;
26			drive-strength = "r0-4";
27			drive-open-drain;
28			slew-rate = "slow";
29			nxp,speed = "100-mhz";
30			input-enable;
31		};
32		group1 {
33			pinmux = <&iomuxc_gpio_02_lpi2c1_scl>;
34			drive-strength = "r0-4";
35			slew-rate = "slow";
36			nxp,speed = "100-mhz";
37		};
38	};
39
40	pinmux_lpspi1: pinmux_lpspi1 {
41		group0 {
42			pinmux = <&iomuxc_gpio_ad_06_lpspi1_sck>,
43				<&iomuxc_gpio_ad_05_lpspi1_pcs0>,
44				<&iomuxc_gpio_ad_04_lpspi1_sdo>,
45				<&iomuxc_gpio_ad_03_lpspi1_sdi>;
46			drive-strength = "r0-4";
47			slew-rate = "slow";
48			nxp,speed = "100-mhz";
49		};
50	};
51
52	/* MCUX SDK sets the drive strength of pins on RT1010 to 4 by default */
53	pinmux_lpuart1: pinmux_lpuart1 {
54		group0 {
55			pinmux = <&iomuxc_gpio_09_lpuart1_rxd>,
56				<&iomuxc_gpio_10_lpuart1_txd>;
57			drive-strength = "r0-4";
58			slew-rate = "slow";
59			nxp,speed = "100-mhz";
60		};
61	};
62
63	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
64		group0 {
65			pinmux = <&iomuxc_gpio_09_gpiomux_io09>;
66			drive-strength = "r0-4";
67			bias-pull-up;
68			bias-pull-up-value = "100k";
69			slew-rate = "slow";
70			nxp,speed = "100-mhz";
71		};
72		group1 {
73			pinmux = <&iomuxc_gpio_10_lpuart1_txd>;
74			drive-strength = "r0-4";
75			slew-rate = "slow";
76			nxp,speed = "100-mhz";
77		};
78	};
79
80	/* conflicts with adc1 */
81	pinmux_lpuart4: pinmux_lpuart4 {
82		group0 {
83			pinmux = <&iomuxc_gpio_ad_01_lpuart4_rxd>,
84				<&iomuxc_gpio_ad_02_lpuart4_txd>;
85			drive-strength = "r0-4";
86			slew-rate = "slow";
87			nxp,speed = "100-mhz";
88		};
89	};
90
91	/* conflicts with adc1 */
92	pinmux_lpuart4_sleep: pinmux_lpuart4_sleep {
93		group0 {
94			pinmux = <&iomuxc_gpio_ad_01_gpiomux_io15>;
95			drive-strength = "r0-4";
96			bias-pull-up;
97			bias-pull-up-value = "100k";
98			slew-rate = "slow";
99			nxp,speed = "100-mhz";
100		};
101		group1 {
102			pinmux = <&iomuxc_gpio_ad_02_lpuart4_txd>;
103			drive-strength = "r0-4";
104			slew-rate = "slow";
105			nxp,speed = "100-mhz";
106		};
107	};
108
109	pinmux_sai1: pinmux_sai1 {
110		group0 {
111			pinmux = <&iomuxc_gpio_08_sai1_mclk>,
112				<&iomuxc_gpio_03_sai1_rx_data0>,
113				<&iomuxc_gpio_04_sai1_tx_data0>,
114				<&iomuxc_gpio_07_sai1_tx_sync>,
115				<&iomuxc_gpio_06_sai1_tx_bclk>;
116			drive-strength = "r0-4";
117			slew-rate = "slow";
118			nxp,speed = "100-mhz";
119		};
120	};
121
122};
123
124