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Name Date Size #Lines LOC

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READMED11-Mar-2024789 2012

ghrd_10m50da.qpfD11-Mar-20241.3 KiB3228

ghrd_10m50da.qsfD11-Mar-202434.3 KiB412409

ghrd_10m50da.qsysD11-Mar-202483.8 KiB1,2501,249

ghrd_10m50da.sofD11-Mar-20243.2 MiB

ghrd_10m50da.sopcinfoD11-Mar-2024549.8 KiB18,99018,757

ghrd_10m50da_top.vD11-Mar-20246.2 KiB12251

ghrd_timing.sdcD11-Mar-20241.2 KiB2921

README

1These files are a Nios II/F CPU design provided by Altera for evaluating
2Zephyr on Nios II. This design is intended for the Altera MAX10 10M50 Rec C
3development board. You can find more information about this board here:
4
5https://www.altera.com/products/boards_and_kits/dev-kits/altera/max-10-fpga-development-kit.html
6
7You will need the Quartus SDK in order to modify this CPU or flash it onto
8a supported device. The Lite version of Quartus may be obtained without charge
9from the following link:
10
11http://dl.altera.com/?edition=lite
12
13To flash this CPU, use the nios2-configure-sof tool:
14
15$ nios2-configure-sof ghrd_10m50da.sof
16
17The 'make flash' target will also package up the kernel and CPU into a single
18.pof file which will then put the image onto the device using quartus_pgm tool.
19
20