Home
last modified time | relevance | path

Searched refs:uint64_t (Results 1 – 25 of 879) sorted by relevance

12345678910>>...36

/Zephyr-latest/drivers/interrupt_controller/
Dintc_intel_vtd.h21 uint64_t low;
22 uint64_t high;
26 uint64_t present : 1;
27 uint64_t fpd : 1;
28 uint64_t dst_mode : 1;
29 uint64_t redirection_hint : 1;
30 uint64_t trigger_mode : 1;
31 uint64_t delivery_mode : 3;
32 uint64_t available : 4;
33 uint64_t _reserved_0 : 3;
[all …]
/Zephyr-latest/include/zephyr/arch/arm64/
Dexception.h28 uint64_t x0;
29 uint64_t x1;
30 uint64_t x2;
31 uint64_t x3;
32 uint64_t x4;
33 uint64_t x5;
34 uint64_t x6;
35 uint64_t x7;
36 uint64_t x8;
37 uint64_t x9;
[all …]
Dsyscall.h44 register uint64_t ret __asm__("x0") = arg1; in arch_syscall_invoke6()
45 register uint64_t r1 __asm__("x1") = arg2; in arch_syscall_invoke6()
46 register uint64_t r2 __asm__("x2") = arg3; in arch_syscall_invoke6()
47 register uint64_t r3 __asm__("x3") = arg4; in arch_syscall_invoke6()
48 register uint64_t r4 __asm__("x4") = arg5; in arch_syscall_invoke6()
49 register uint64_t r5 __asm__("x5") = arg6; in arch_syscall_invoke6()
50 register uint64_t r8 __asm__("x8") = call_id; in arch_syscall_invoke6()
67 register uint64_t ret __asm__("x0") = arg1; in arch_syscall_invoke5()
68 register uint64_t r1 __asm__("x1") = arg2; in arch_syscall_invoke5()
69 register uint64_t r2 __asm__("x2") = arg3; in arch_syscall_invoke5()
[all …]
Dthread.h27 uint64_t x19;
28 uint64_t x20;
29 uint64_t x21;
30 uint64_t x22;
31 uint64_t x23;
32 uint64_t x24;
33 uint64_t x25;
34 uint64_t x26;
35 uint64_t x27;
36 uint64_t x28;
[all …]
/Zephyr-latest/include/zephyr/arch/x86/intel64/
Dthread.h64 uint64_t rsp0; /* privileged stacks */
65 uint64_t rsp1;
66 uint64_t rsp2;
70 uint64_t ist1; /* interrupt stacks */
71 uint64_t ist2;
72 uint64_t ist3;
73 uint64_t ist4;
74 uint64_t ist5;
75 uint64_t ist6;
76 uint64_t ist7;
[all …]
/Zephyr-latest/drivers/dma/
Ddma_iproc_pax_v2.h70 uint64_t opq : 16; /*pkt_id 15:0*/
71 uint64_t bdf : 16; /*reserved 31:16*/
72 uint64_t res1 : 4; /*res 32:35*/
73 uint64_t bdcount : 5; /*bdcount 36:40*/
74 uint64_t prot : 2; /*prot 41:42*/
75 uint64_t res2 : 1; /*res :43:43*/
76 uint64_t pcie_addr_msb : 8; /*pcie addr :44:51*/
77 uint64_t res3 : 4; /*res :52:55*/
78 uint64_t start : 1; /*S :56*/
79 uint64_t end : 1; /*E:57*/
[all …]
Ddma_iproc_pax_v1.h63 uint64_t opq : 16; /*pkt_id 15:0*/
64 uint64_t res1 : 20; /*reserved 35:16*/
65 uint64_t bdcount : 5; /*bdcount 40:36*/
66 uint64_t prot : 2; /*prot 41:40*/
67 uint64_t res2 : 13; /*reserved 55:43*/
68 uint64_t start : 1; /*start pkt :56*/
69 uint64_t end : 1; /*end pkt :57*/
70 uint64_t toggle : 1; /*toggle :58*/
71 uint64_t res3 : 1; /*reserved :59*/
72 uint64_t type : 4; /*type 63:60*/
[all …]
/Zephyr-latest/include/zephyr/timing/
Dtiming.h100 uint64_t soc_timing_cycles_get(volatile timing_t *const start,
110 uint64_t soc_timing_freq_get(void);
120 uint64_t soc_timing_cycles_to_ns(uint64_t cycles);
131 uint64_t soc_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count);
216 uint64_t board_timing_cycles_get(volatile timing_t *const start,
226 uint64_t board_timing_freq_get(void);
236 uint64_t board_timing_cycles_to_ns(uint64_t cycles);
247 uint64_t board_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count);
318 static inline uint64_t timing_cycles_get(volatile timing_t *const start, in timing_cycles_get()
335 static inline uint64_t timing_freq_get(void) in timing_freq_get()
[all …]
/Zephyr-latest/arch/arm64/core/
Dcoredump.c21 uint64_t x0;
22 uint64_t x1;
23 uint64_t x2;
24 uint64_t x3;
25 uint64_t x4;
26 uint64_t x5;
27 uint64_t x6;
28 uint64_t x7;
29 uint64_t x8;
30 uint64_t x9;
[all …]
/Zephyr-latest/arch/x86/core/intel64/
Dcoredump.c14 uint64_t vector;
15 uint64_t code;
18 uint64_t rax;
19 uint64_t rcx;
20 uint64_t rdx;
21 uint64_t rsi;
22 uint64_t rdi;
23 uint64_t rsp;
24 uint64_t r8;
25 uint64_t r9;
[all …]
/Zephyr-latest/subsys/bluetooth/audio/
Dmedia_proxy_internal.h53 void (*current_track_id)(uint64_t id);
55 void (*next_track_id)(uint64_t id);
57 void (*current_group_id)(uint64_t id);
59 void (*parent_group_id)(uint64_t id);
73 void (*search_results_id)(uint64_t id);
84 uint64_t media_proxy_sctrl_get_icon_id(void);
103 uint64_t media_proxy_sctrl_get_track_segments_id(void);
105 uint64_t media_proxy_sctrl_get_current_track_id(void);
106 void media_proxy_sctrl_set_current_track_id(uint64_t id);
108 uint64_t media_proxy_sctrl_get_next_track_id(void);
[all …]
/Zephyr-latest/include/zephyr/logging/
Dlog_frontend_stmesp_demux.h80 uint64_t type: 2;
83 uint64_t content_invalid: 1;
92 uint64_t type: 2;
95 uint64_t content_invalid: 1;
98 uint64_t timestamp: 59;
116 uint64_t type: 2;
119 uint64_t content_invalid: 1;
122 uint64_t has_data: 1;
125 uint64_t timestamp: 54;
128 uint64_t major: 4;
[all …]
/Zephyr-latest/subsys/debug/
Dmipi_stp_decoder.c82 typedef void (*stp_cb)(uint64_t data, uint64_t ts);
102 static uint64_t prev_ts;
103 static uint64_t base_ts;
110 static void data4_cb(uint64_t data, uint64_t ts) in data4_cb()
118 static void data8_cb(uint64_t data, uint64_t ts) in data8_cb()
126 static void data16_cb(uint64_t data, uint64_t ts) in data16_cb()
134 static void data32_cb(uint64_t data, uint64_t ts) in data32_cb()
142 static void data64_cb(uint64_t data, uint64_t ts) in data64_cb()
150 static void data4_m_cb(uint64_t data, uint64_t ts) in data4_m_cb()
158 static void data8_m_cb(uint64_t data, uint64_t ts) in data8_m_cb()
[all …]
/Zephyr-latest/arch/x86/
Dtiming.c13 K_APP_BMEM(z_libc_partition) static uint64_t tsc_freq; in K_APP_BMEM()
18 uint64_t tsc_start, tsc_end;
19 uint64_t cyc_freq = sys_clock_hw_cycles_per_sec();
20 uint64_t dcyc, dtsc;
43 uint64_t arch_timing_x86_freq_get(void) in arch_timing_x86_freq_get()
66 uint64_t arch_timing_cycles_get(volatile timing_t *const start, in arch_timing_cycles_get()
73 uint64_t arch_timing_freq_get(void) in arch_timing_freq_get()
78 uint64_t arch_timing_cycles_to_ns(uint64_t cycles) in arch_timing_cycles_to_ns()
83 uint64_t arch_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count) in arch_timing_cycles_to_ns_avg()
/Zephyr-latest/arch/arm/core/cortex_m/
Dtiming.c29 static inline uint64_t z_arm_dwt_freq_get(void) in z_arm_dwt_freq_get()
46 static uint64_t dwt_frequency; in z_arm_dwt_freq_get()
48 uint64_t dwt_start, dwt_end; in z_arm_dwt_freq_get()
49 uint64_t cyc_freq = sys_clock_hw_cycles_per_sec(); in z_arm_dwt_freq_get()
50 uint64_t dcyc, ddwt; in z_arm_dwt_freq_get()
103 uint64_t arch_timing_cycles_get(volatile timing_t *const start, in arch_timing_cycles_get()
109 uint64_t arch_timing_freq_get(void) in arch_timing_freq_get()
114 uint64_t arch_timing_cycles_to_ns(uint64_t cycles) in arch_timing_cycles_to_ns()
119 uint64_t arch_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count) in arch_timing_cycles_to_ns_avg()
/Zephyr-latest/boards/native/native_posix/
Dirq_ctrl.c19 uint64_t irq_ctrl_timer = NEVER;
22 static uint64_t irq_status; /* pending interrupts */
23 static uint64_t irq_premask; /* interrupts before the mask */
33 static uint64_t irq_mask;
97 uint64_t hw_irq_status = hw_irq_ctrl_get_irq_status(); in hw_irq_ctrl_get_highest_prio_irq()
104 hw_irq_status &= ~((uint64_t) 1 << irq_nbr); in hw_irq_ctrl_get_highest_prio_irq()
134 uint64_t hw_irq_ctrl_get_irq_status(void) in hw_irq_ctrl_get_irq_status()
153 irq_mask &= ~((uint64_t)1<<irq); in hw_irq_ctrl_disable_irq()
158 return (irq_mask & ((uint64_t)1 << irq))?1:0; in hw_irq_ctrl_is_irq_enabled()
161 uint64_t hw_irq_ctrl_get_irq_mask(void) in hw_irq_ctrl_get_irq_mask()
[all …]
Dhw_counter.c14 uint64_t hw_counter_timer;
17 static uint64_t counter_value;
18 static uint64_t counter_target;
19 static uint64_t counter_period;
20 static uint64_t counter_wrap;
54 void hw_counter_set_period(uint64_t period) in hw_counter_set_period()
64 void hw_counter_set_wrap_value(uint64_t wrap_value) in hw_counter_set_wrap_value()
105 uint64_t hw_counter_get_value(void) in hw_counter_get_value()
122 void hw_counter_set_target(uint64_t target) in hw_counter_set_target()
Dhw_models_top.c27 static uint64_t simu_time; /* The actual time as known by the HW models */
28 static uint64_t end_of_time = NEVER; /* When will this device stop */
31 extern uint64_t hw_timer_timer; /* When should this timer_model be called */
32 extern uint64_t irq_ctrl_timer;
33 extern uint64_t hw_counter_timer;
43 static uint64_t *Timer_list[NUMBER_OF_TIMERS] = {
49 static uint64_t next_timer_time;
99 (uint64_t)next_timer_time, in hwm_sleep_until_next_timer()
100 (uint64_t)simu_time, in hwm_sleep_until_next_timer()
161 void hwm_set_end_of_time(uint64_t new_end_of_time) in hwm_set_end_of_time()
[all …]
/Zephyr-latest/scripts/native_simulator/native/src/
Dirq_ctrl.c19 static uint64_t irq_ctrl_timer = NSI_NEVER;
21 static uint64_t irq_status; /* pending interrupts */
22 static uint64_t irq_premask; /* interrupts before the mask */
32 static uint64_t irq_mask;
93 uint64_t irq_status = hw_irq_ctrl_get_irq_status(); in hw_irq_ctrl_get_highest_prio_irq()
100 irq_status &= ~((uint64_t) 1 << irq_nbr); in hw_irq_ctrl_get_highest_prio_irq()
135 uint64_t hw_irq_ctrl_get_irq_status(void) in hw_irq_ctrl_get_irq_status()
154 irq_mask &= ~((uint64_t)1<<irq); in hw_irq_ctrl_disable_irq()
159 return (irq_mask & ((uint64_t)1 << irq))?1:0; in hw_irq_ctrl_is_irq_enabled()
165 uint64_t hw_irq_ctrl_get_irq_mask(void) in hw_irq_ctrl_get_irq_mask()
[all …]
Dhw_counter.c14 static uint64_t hw_counter_timer;
17 static uint64_t counter_value;
18 static uint64_t counter_target;
19 static uint64_t counter_period;
20 static uint64_t counter_wrap;
58 void hw_counter_set_period(uint64_t period) in hw_counter_set_period()
68 void hw_counter_set_wrap_value(uint64_t wrap_value) in hw_counter_set_wrap_value()
109 uint64_t hw_counter_get_value(void) in hw_counter_get_value()
126 void hw_counter_set_target(uint64_t target) in hw_counter_set_target()
/Zephyr-latest/arch/xtensa/core/
Dtiming.c18 uint64_t arch_timing_freq_get(void) in arch_timing_freq_get()
32 uint64_t arch_timing_cycles_get(volatile timing_t *const start, in arch_timing_cycles_get()
41 return (uint64_t) dt; in arch_timing_cycles_get()
44 uint64_t arch_timing_cycles_to_ns(uint64_t cycles) in arch_timing_cycles_to_ns()
49 uint64_t arch_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count) in arch_timing_cycles_to_ns_avg()
52 return arch_timing_cycles_to_ns(cycles) / (uint64_t) count; in arch_timing_cycles_to_ns_avg()
/Zephyr-latest/arch/riscv/core/
Dcoredump.c20 uint64_t ra;
21 uint64_t tp;
22 uint64_t t0;
23 uint64_t t1;
24 uint64_t t2;
25 uint64_t a0;
26 uint64_t a1;
27 uint64_t a2;
28 uint64_t a3;
29 uint64_t a4;
[all …]
/Zephyr-latest/include/zephyr/sys/
Dhash_map_api.h52 uint64_t key;
54 uint64_t value;
106 typedef void (*sys_hashmap_callback_t)(uint64_t key, uint64_t value, void *cookie);
134 typedef int (*sys_hashmap_insert_t)(struct sys_hashmap *map, uint64_t key, uint64_t value,
135 uint64_t *old_value);
149 typedef bool (*sys_hashmap_remove_t)(struct sys_hashmap *map, uint64_t key, uint64_t *value);
163 typedef bool (*sys_hashmap_get_t)(const struct sys_hashmap *map, uint64_t key, uint64_t *value);
/Zephyr-latest/include/zephyr/drivers/misc/timeaware_gpio/
Dtimeaware_gpio.h54 int (*get_time)(const struct device *dev, uint64_t *current_time);
56 int (*set_perout)(const struct device *dev, uint32_t pin, uint64_t start_time,
57 uint64_t repeat_interval, bool periodic_enable);
59 int (*read_ts_ec)(const struct device *dev, uint32_t pin, uint64_t *timestamp,
60 uint64_t *event_count);
76 __syscall int tgpio_port_get_time(const struct device *dev, uint64_t *current_time);
78 static inline int z_impl_tgpio_port_get_time(const struct device *dev, uint64_t *current_time) in z_impl_tgpio_port_get_time()
152 uint64_t start_time, uint64_t repeat_interval,
156 uint64_t start_time, uint64_t repeat_interval, in z_impl_tgpio_pin_periodic_output()
174 __syscall int tgpio_pin_read_ts_ec(const struct device *dev, uint32_t pin, uint64_t *timestamp,
[all …]
/Zephyr-latest/subsys/net/ip/
Dnet_timeout.c14 uint64_t expire_timeout; in net_timeout_set()
27 expire_timeout = (uint64_t)MSEC_PER_SEC * (uint64_t)lifetime; in net_timeout_set()
29 (uint64_t)NET_TIMEOUT_MAX_VALUE; in net_timeout_set()
31 (uint64_t)NET_TIMEOUT_MAX_VALUE * in net_timeout_set()
32 (uint64_t)timeout->wrap_counter; in net_timeout_set()
47 uint64_t start; in net_timeout_deadline()
48 uint64_t deadline; in net_timeout_deadline()
53 start = (uint64_t)now; in net_timeout_deadline()
58 deadline += (uint64_t)NET_TIMEOUT_MAX_VALUE in net_timeout_deadline()
59 * (uint64_t)timeout->wrap_counter; in net_timeout_deadline()
[all …]

12345678910>>...36