Searched refs:tx_dma_desc (Results 1 – 1 of 1) sorted by relevance
129 static XMC_ETH_MAC_DMA_DESC_t __aligned(4) tx_dma_desc[NUM_TX_DMA_DESCRIPTORS];141 memset(tx_dma_desc, 0, sizeof(tx_dma_desc)); in eth_xmc4xxx_tx_dma_descriptors_init()143 dev_cfg->regs->TRANSMIT_DESCRIPTOR_LIST_ADDRESS = (uint32_t)&tx_dma_desc[0]; in eth_xmc4xxx_tx_dma_descriptors_init()147 XMC_ETH_MAC_DMA_DESC_t *dma_desc = &tx_dma_desc[i]; in eth_xmc4xxx_tx_dma_descriptors_init()149 dma_desc->buffer2 = (volatile uint32_t)&tx_dma_desc[i + 1]; in eth_xmc4xxx_tx_dma_descriptors_init()153 tx_dma_desc[NUM_TX_DMA_DESCRIPTORS - 1].status |= ETH_MAC_DMA_TDES0_TER; in eth_xmc4xxx_tx_dma_descriptors_init()154 tx_dma_desc[NUM_TX_DMA_DESCRIPTORS - 1].buffer2 = (volatile uint32_t)&tx_dma_desc[0]; in eth_xmc4xxx_tx_dma_descriptors_init()286 dma_desc = &tx_dma_desc[dev_data->dma_desc_tx_head]; in eth_xmc4xxx_send()341 tx_dma_desc[tx_frame->tail_index].status |= ETH_MAC_DMA_TDES0_OWN; in eth_xmc4xxx_send()516 if (IS_OWNED_BY_DMA_TX(&tx_dma_desc[index])) { in eth_xmc4xxx_handle_tx()[all …]
