1 /*
2 * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include "soc.h"
8
9 #ifndef CONFIG_MCUBOOT
10 extern int _instruction_reserved_start;
11 extern int _instruction_reserved_end;
12 extern int _rodata_reserved_start;
13 extern int _rodata_reserved_end;
14
15 extern void rom_config_data_cache_mode(uint32_t cfg_cache_size, uint8_t cfg_cache_ways,
16 uint8_t cfg_cache_line_size);
17 extern void rom_config_instruction_cache_mode(uint32_t cfg_cache_size, uint8_t cfg_cache_ways,
18 uint8_t cfg_cache_line_size);
19 extern void Cache_Set_IDROM_MMU_Info(uint32_t instr_page_num, uint32_t rodata_page_num,
20 uint32_t rodata_start, uint32_t rodata_end, int i_off,
21 int ro_off);
22 extern void Cache_Enable_ICache(uint32_t autoload);
23
esp_config_instruction_cache_mode(void)24 void IRAM_ATTR esp_config_instruction_cache_mode(void)
25 {
26 rom_config_instruction_cache_mode(CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE,
27 CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS,
28 CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE);
29 }
30
esp_config_data_cache_mode(void)31 void IRAM_ATTR esp_config_data_cache_mode(void)
32 {
33 Cache_Suspend_DCache();
34 rom_config_data_cache_mode(CONFIG_ESP32S3_DATA_CACHE_SIZE,
35 CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS,
36 CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE);
37 Cache_Resume_DCache(0);
38
39 /* Configure the Cache MMU size for instruction and rodata in flash. */
40 uint32_t _instruction_size =
41 (uint32_t)&_instruction_reserved_end - (uint32_t)&_instruction_reserved_start;
42 uint32_t cache_mmu_irom_size =
43 ((_instruction_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE) *
44 sizeof(uint32_t);
45 uint32_t _rodata_size = (uint32_t)&_rodata_reserved_end - (uint32_t)&_rodata_reserved_start;
46 uint32_t cache_mmu_drom_size =
47 ((_rodata_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE) *
48 sizeof(uint32_t);
49
50 Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
51
52 int s_instr_flash2spiram_off = 0;
53 int s_rodata_flash2spiram_off = 0;
54 Cache_Set_IDROM_MMU_Info(cache_mmu_irom_size / sizeof(uint32_t),
55 cache_mmu_drom_size / sizeof(uint32_t),
56 (uint32_t)&_rodata_reserved_start, (uint32_t)&_rodata_reserved_end,
57 s_instr_flash2spiram_off, s_rodata_flash2spiram_off);
58 }
59 #endif /* CONFIG_MCUBOOT */
60
