1# Copyright (c) 2017 Christian Taedcke
2# Copyright (c) 2018 Gil Benkoe
3# SPDX-License-Identifier: Apache-2.0
4
5rsource "*/Kconfig"
6
7if SOC_FAMILY_SILABS_S0 || SOC_FAMILY_SILABS_S1 || SOC_FAMILY_SILABS_S2
8
9config SOC_GECKO_SDID
10	int
11	help
12	  Gecko SDK sometime refere to the chipset using the internal ID. This
13	  entry reflects this ID.
14
15config SOC_GECKO_BURTC
16	bool
17	help
18	  Set if the Back-Up Real Time Counter (BURTC) HAL module is used.
19
20config SOC_GECKO_CORE
21	bool
22	default y
23	help
24	  Set if the Core interrupt handling (CORE) HAL module is used.
25
26config SOC_SILABS_ACMP
27	bool
28	help
29	  Set if the Analog comparator (ACMP) HAL module is used.
30
31config SOC_GECKO_ADC
32	bool
33	help
34	  Set if the Analog to Digital Converter (ADC) HAL module is used.
35
36config SOC_GECKO_IADC
37	bool
38	help
39	  Set if the Incremental Analog to Digital Converter (IADC) HAL module is used.
40
41config SOC_GECKO_CRYOTIMER
42	bool
43	help
44	  Set if the Ultra Low Energy Timer/Counter (CRYOTIMER) HAL module is used.
45
46config SOC_GECKO_EMU
47	bool
48	help
49	  Set if the Energy Management Unit (EMU) HAL module is used.
50
51config SOC_GECKO_GPIO
52	bool
53	help
54	  Set if the General Purpose Input/Output (GPIO) HAL module is used.
55
56config SOC_GECKO_I2C
57	bool
58	help
59	  Set if the Inter-Integrated Circuit Interface (I2C) HAL module is used.
60
61config SOC_GECKO_LETIMER
62	bool
63	help
64	  Set if the Low Energy Timer (LETIMER) HAL module is used.
65
66config SOC_GECKO_LEUART
67	bool
68	help
69	  Set if the Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)
70	  HAL module is used.
71
72config SOC_GECKO_LDMA
73	bool
74	help
75	  Set if the Linked Direct Memory Access (LDMA) HAL module is used.
76
77config SOC_GECKO_MSC
78	bool
79	help
80	  Set if the Memory System Controller (MSC) HAL module is used.
81
82config SOC_GECKO_PRS
83	bool
84	help
85	  Set if the Peripheral Reflex System (PRS) HAL module is used.
86
87config SOC_GECKO_RMU
88	bool
89	help
90	  Set if the Reset Management Unit (RMU) HAL module is used.
91
92config SOC_GECKO_RTC
93	bool
94	help
95	  Set if the Real Time Counter (RTC) HAL module is used.
96
97config SOC_GECKO_RTCC
98	bool
99	help
100	  Set if the Real Time Counter and Calendar (RTCC) HAL module is used.
101
102config SOC_GECKO_SE
103	bool
104	help
105	  Set if the Secure Element (SE) HAL module is used.
106
107config SOC_GECKO_TIMER
108	bool
109	help
110	  Set if the Timer/Counter (TIMER) HAL module is used.
111
112config SOC_GECKO_USART
113	bool
114	help
115	  Set if the Universal Synchronous Asynchronous Receiver/Transmitter (USART)
116	  HAL module is used.
117
118config SOC_GECKO_EUSART
119	bool
120	help
121	  Set if the Extended Universal Synchronous Asynchronous Receiver/Transmitter (EUSART)
122	  HAL module is used.
123
124config SOC_GECKO_WDOG
125	bool
126	help
127	  Set if the Watchdog Timer (WDOG) HAL module is used.
128
129config SOC_GECKO_TRNG
130	bool
131	help
132	  Set if the SoC has a True Random Number Generator (TRNG) module.
133
134config SOC_SILABS_SLEEPTIMER
135	bool
136	select SOC_GECKO_PRS
137	select SOC_GECKO_RTCC if SOC_FAMILY_SILABS_S2 && $(dt_nodelabel_enabled,rtcc0)
138	help
139	  Set if the Sleeptimer HAL module is used.
140
141config SOC_SILABS_HFXO_MANAGER
142	bool
143	default y if PM && $(dt_nodelabel_enabled,sysrtc0) && $(dt_nodelabel_enabled,hfxo)
144	help
145	  Set if the HFXO Manager HAL module is used.
146
147if PM
148
149config SOC_GECKO_PM_BACKEND_PMGR
150	bool
151	depends on SOC_GECKO_DEV_INIT
152	default y if SOC_FAMILY_SILABS_S2
153	help
154	  Implement PM using sl_power_manager service from Gecko SDK
155
156config SOC_GECKO_PM_BACKEND_EMU
157	bool
158	default y if !SOC_GECKO_PM_BACKEND_PMGR
159	help
160	  Implement PM using direct calls to EMU driver in emlib
161
162endif # PM
163
164config SOC_GECKO_EMU_DCDC
165	bool "SoC DC/DC regulator"
166	select SOC_GECKO_EMU
167	help
168	  Enable the on chip DC/DC regulator
169
170choice SOC_GECKO_EMU_DCDC_MODE
171	prompt "DC/DC mode"
172	depends on SOC_GECKO_EMU_DCDC
173	help
174	  Select power configuration mode of the on chip DC/DC converter.
175
176	config SOC_GECKO_EMU_DCDC_MODE_UNCONFIGURED
177		bool "Initial / Unconfigured"
178
179	config SOC_GECKO_EMU_DCDC_MODE_ON
180		bool "DC/DC On"
181
182	config SOC_GECKO_EMU_DCDC_MODE_OFF
183		bool "DC/DC Off"
184
185	config SOC_GECKO_EMU_DCDC_MODE_BYPASS
186		bool "Bypass"
187endchoice
188
189config CRYPTO_ACC_GECKO_TRNG
190	bool
191	help
192	  Enable Entropy driver based on the CRYPTO_ACC module for Silicon Labs
193	  Gecko chips.
194
195config SOC_GECKO_DEV_INIT
196	bool
197	help
198	  Use the device initialization routines from the device_init service
199	  in Silicon Labs HAL. These routines initialize and tune HFXOs,
200	  configures DPLLs and manages the Energy Management Unit.
201
202	  Disabling these services may negatively impact counter and timer
203	  routines in Silabs SoCs.
204
205config COUNTER_GECKO_STIMER
206	bool
207	help
208	  Enable counter driver based on the Sleep Timer driver for Silicon Labs
209	  Gecko chips.
210
211config SOC_GECKO_CMU
212	bool
213	help
214	  Set if the clock management unit (CMU) is present in the SoC.
215
216if SOC_GECKO_CMU && (SOC_FAMILY_SILABS_S0 || SOC_FAMILY_SILABS_S1)
217
218config CMU_NEED_LFXO
219	bool
220	help
221	  Set if LFXO oscillator should be configured and enabled, potentially
222	  in on-demand mode, after SoC is initialized.
223
224choice
225	prompt "High Frequency Clock Selection"
226	default CMU_HFCLK_HFXO
227
228config CMU_HFCLK_HFXO
229	bool "External high frequency crystal oscillator"
230	help
231	  Set this option to use the external high frequency crystal oscillator
232	  as high frequency clock.
233
234config CMU_HFCLK_LFXO
235	bool "External low frequency crystal oscillator"
236	select CMU_NEED_LFXO
237	help
238	  Set this option to use the external low frequency crystal oscillator
239	  as high frequency clock.
240
241config CMU_HFCLK_HFRCO
242	bool "Internal high frequency RC oscillator"
243	help
244	  Set this option to use the internal high frequency RC oscillator as high frequency clock.
245
246endchoice
247
248config CMU_HFXO_FREQ
249	int "External high frequency oscillator frequency"
250	help
251	  Set the external high frequency oscillator frequency in Hz. This should be set by the
252	  board's defconfig.
253
254config CMU_LFXO_FREQ
255	int "External low frequency oscillator frequency"
256	help
257	  Set the external low frequency oscillator frequency in Hz. This should be set by the
258	  board's defconfig.
259
260config CMU_HFRCO_FREQ
261	int "Internal high frequency RC oscillator frequency"
262	default 0
263	depends on SOC_GECKO_HAS_HFRCO_FREQRANGE
264	help
265	  Set the internal high frequency RC oscillator frequency in Hz. This should be set by the
266	  board's defconfig. Only supported values may be used here. Setting this to 0, skips the
267	  configuration of the high frequency RC oscillator completely. This may be desired, if
268	  the bootloader already configured it properly or the device's default clock source should
269	  be used with it's default configuration.
270
271endif # SOC_GECKO_CMU
272
273config SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
274	bool
275	help
276	  If enabled, indicates that SoC allows to configure individual pin
277	  locations. This is supported by e.g. efr32fg1p, efr32mg12p series.
278	  If disabled, indicates that pin locations are configured in groups.
279	  This is supported by e.g. efm32hg, efm32wg series.
280
281config SOC_GECKO_HAS_ERRATA_RTCC_E201
282	bool
283	help
284	  Set if the SoC is affected by errata RTCC_E201:
285	  "When the RTCC is configured with a prescaler, the CCV1 top value enable
286	  feature enabled by setting CCV1TOP in RTCC_CTRL fails to wrap the counter
287	  when RTCC_CNT is equal to RTCC_CC1_CCV, as intended."
288
289config SOC_GECKO_HAS_HFRCO_FREQRANGE
290	bool
291	help
292	  If enabled, indicates that configuration of HFRCO frequency for this SOC is supported
293	  via FREQRANGE field. This is supported for e.g. efr32fg1p, efr32mg12p series.
294	  If disabled, indicates that configuration of HFRCO frequency for corresponding SOC
295	  is not supported via this field. This is the case for e.g. efm32hg, efm32wg series.
296
297config SOC_GECKO_HAS_RADIO
298	bool
299	help
300	  If enabled, indicates that the SoC has a Radio PHY.
301
302config SOC_GECKO_USE_RAIL
303	bool "Use RAIL (Radio Abstraction Interface Layer)"
304	depends on SOC_GECKO_HAS_RADIO
305	help
306	  RAIL (Radio Abstraction Interface Layer) is a library needed to use the EFR radio
307	  hardware. This option enable the proper set of features to allow to properly compile
308	  with the RAIL blob.
309
310config SOC_GECKO_CUSTOM_RADIO_PHY
311	bool "Use RAIL for custom radio phy packet sending and receiving"
312	depends on SOC_GECKO_HAS_RADIO
313	select SOC_GECKO_USE_RAIL
314	help
315	  If enabled, RAIL can be used for user generated custom radio phy
316	  management, sending and receiving packets on radio phy. User has
317	  to provide the radio_config.c and radio_config.h files for the phy.
318
319endif # SOC_FAMILY_SILABS_S0 || SOC_FAMILY_SILABS_S1 || SOC_FAMILY_SILABS_S2
320