1 /*
2 * Copyright (c) 2024 sensry.io
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT sensry_sy1xx_gpio
8
9 #include <zephyr/logging/log.h>
10 LOG_MODULE_REGISTER(sy1xx_gpio, CONFIG_GPIO_LOG_LEVEL);
11
12 #include <errno.h>
13 #include <zephyr/kernel.h>
14 #include <zephyr/device.h>
15 #include <zephyr/drivers/gpio.h>
16 #include <zephyr/sys/util.h>
17 #include <zephyr/drivers/gpio/gpio_utils.h>
18 #include <pinctrl_soc.h>
19 #include <zephyr/drivers/pinctrl.h>
20
21 #define SY1XX_GPIO_GET_OFFS 0x00
22 #define SY1XX_GPIO_SET_OFFS 0x1c
23 #define SY1XX_GPIO_CLR_OFFS 0x20
24
25 struct sy1xx_gpio_config {
26 /* Base address for GPIO port*/
27 uint32_t port_base_addr;
28 /* configuration base address for the pad config */
29 uint32_t pad_cfg_offs;
30 /* mask of pins which are allowed to modify by the gpio driver */
31 uint32_t pin_mask;
32 };
33
34 /* Function prototypes for the GPIO API */
35 static int sy1xx_gpio_driver_configure(const struct device *dev, gpio_pin_t pin,
36 gpio_flags_t flags);
37 static int sy1xx_gpio_driver_port_get_raw(const struct device *dev, gpio_port_value_t *value);
38 static int sy1xx_gpio_driver_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask,
39 gpio_port_value_t value);
40 static int sy1xx_gpio_driver_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins);
41 static int sy1xx_gpio_driver_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins);
42 static int sy1xx_gpio_driver_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins);
43
sy1xx_gpio_driver_init(const struct device * dev)44 static int sy1xx_gpio_driver_init(const struct device *dev)
45 {
46 return 0;
47 }
48
sy1xx_gpio_driver_configure(const struct device * dev,gpio_pin_t pin,gpio_flags_t flags)49 int sy1xx_gpio_driver_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
50 {
51 const struct sy1xx_gpio_config *const cfg = dev->config;
52
53 if (((BIT(pin)) & cfg->pin_mask) == 0) {
54 return -EINVAL;
55 }
56
57 /* initialize the pinctrl config for the given gpio pin */
58 pinctrl_soc_pin_t pcfg = {
59 .addr = cfg->pad_cfg_offs + ROUND_DOWN(pin, 4),
60 .iro = (pin % 4) * 8,
61 .cfg = 0,
62 };
63
64 /* translate gpio flags into pinctrl config */
65 if (flags & GPIO_INPUT) {
66
67 if (flags & GPIO_PULL_UP) {
68 pcfg.cfg |= BIT(SY1XX_PAD_PULL_UP_OFFS);
69 }
70 if (flags & GPIO_PULL_DOWN) {
71 pcfg.cfg |= BIT(SY1XX_PAD_PULL_DOWN_OFFS);
72 }
73
74 } else if (flags & GPIO_OUTPUT) {
75 pcfg.cfg |= BIT(SY1XX_PAD_DIR_OFFS);
76
77 if (flags & GPIO_OUTPUT_INIT_LOW) {
78 sy1xx_gpio_driver_port_set_masked_raw(dev, BIT(pin), 0);
79 }
80 if (flags & GPIO_OUTPUT_INIT_HIGH) {
81 sy1xx_gpio_driver_port_set_masked_raw(dev, BIT(pin), BIT(pin));
82 }
83
84 } else if (flags == GPIO_DISCONNECTED) {
85 pcfg.cfg |= BIT(SY1XX_PAD_TRISTATE_OFFS);
86
87 } else {
88 LOG_ERR("%s: unsupported pinctrl mode for pin: %u", dev->name, pin);
89 return -ENOTSUP;
90 }
91
92 /* PAD config */
93 int32_t ret = pinctrl_configure_pins(&pcfg, 1, PINCTRL_STATE_DEFAULT);
94
95 if (ret != 0) {
96 LOG_ERR("%s: failed to apply pinctrl for pin: %u", dev->name, pin);
97 return -EINVAL;
98 }
99
100 return 0;
101 }
102
sy1xx_gpio_driver_port_get_raw(const struct device * dev,gpio_port_value_t * value)103 int sy1xx_gpio_driver_port_get_raw(const struct device *dev, gpio_port_value_t *value)
104 {
105 const struct sy1xx_gpio_config *const cfg = dev->config;
106
107 *value = sys_read32(cfg->port_base_addr | SY1XX_GPIO_GET_OFFS);
108 return 0;
109 }
110
sy1xx_gpio_driver_port_set_masked_raw(const struct device * dev,gpio_port_pins_t mask,gpio_port_value_t value)111 int sy1xx_gpio_driver_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask,
112 gpio_port_value_t value)
113 {
114 const struct sy1xx_gpio_config *const cfg = dev->config;
115
116 uint32_t set_mask = (mask & value) & (cfg->pin_mask);
117 uint32_t clr_mask = (mask & (~value)) & (cfg->pin_mask);
118
119 sy1xx_gpio_driver_port_set_bits_raw(dev, set_mask);
120 sy1xx_gpio_driver_port_clear_bits_raw(dev, clr_mask);
121 return 0;
122 }
123
sy1xx_gpio_driver_port_set_bits_raw(const struct device * dev,gpio_port_pins_t pins)124 int sy1xx_gpio_driver_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins)
125 {
126 const struct sy1xx_gpio_config *const cfg = dev->config;
127
128 /* affects only pins that are set to logical '1' */
129 sys_write32((uint32_t)pins, cfg->port_base_addr | SY1XX_GPIO_SET_OFFS);
130 return 0;
131 }
132
sy1xx_gpio_driver_port_clear_bits_raw(const struct device * dev,gpio_port_pins_t pins)133 int sy1xx_gpio_driver_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins)
134 {
135 const struct sy1xx_gpio_config *const cfg = dev->config;
136
137 /* affects only pins that are set to logical '1' */
138 sys_write32((uint32_t)pins, cfg->port_base_addr | SY1XX_GPIO_CLR_OFFS);
139 return 0;
140 }
141
sy1xx_gpio_driver_port_toggle_bits(const struct device * dev,gpio_port_pins_t pins)142 int sy1xx_gpio_driver_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins)
143 {
144 const struct sy1xx_gpio_config *const cfg = dev->config;
145
146 uint32_t current = sys_read32(cfg->port_base_addr | SY1XX_GPIO_GET_OFFS);
147
148 sy1xx_gpio_driver_port_set_masked_raw(dev, pins, ~current);
149 return 0;
150 }
151
152 /* Define the GPIO API structure */
153 static DEVICE_API(gpio, sy1xx_gpio_driver_api) = {
154 .pin_configure = sy1xx_gpio_driver_configure,
155 .port_get_raw = sy1xx_gpio_driver_port_get_raw,
156 .port_set_masked_raw = sy1xx_gpio_driver_port_set_masked_raw,
157 .port_set_bits_raw = sy1xx_gpio_driver_port_set_bits_raw,
158 .port_clear_bits_raw = sy1xx_gpio_driver_port_clear_bits_raw,
159 .port_toggle_bits = sy1xx_gpio_driver_port_toggle_bits,
160 };
161
162 #define SY1XX_GPIO_INIT(n) \
163 \
164 static const struct sy1xx_gpio_config sy1xx_gpio_##n##_config = { \
165 .port_base_addr = (uint32_t)DT_INST_REG_ADDR_BY_IDX(n, 0), \
166 .pad_cfg_offs = (uint32_t)DT_INST_PROP(n, pad_cfg), \
167 .pin_mask = (uint32_t)GPIO_PORT_PIN_MASK_FROM_DT_INST(n)}; \
168 \
169 DEVICE_DT_INST_DEFINE(n, sy1xx_gpio_driver_init, NULL, NULL, &sy1xx_gpio_##n##_config, \
170 PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY, &sy1xx_gpio_driver_api);
171
172 DT_INST_FOREACH_STATUS_OKAY(SY1XX_GPIO_INIT)
173
