Searched refs:irq_type (Results 1 – 9 of 9) sorted by relevance
| /Zephyr-latest/drivers/gpio/ |
| D | gpio_renesas_rz.c | 335 uint8_t int_num, uint8_t irq_type, gpio_pin_t pin) in gpio_rz_int_enable() argument
337 if (irq_type == GPIO_RZ_INT_UNSUPPORTED) { in gpio_rz_int_enable()
352 *titsr |= (irq_type << GPIO_RZ_TITSR_OFFSET(int_num)); in gpio_rz_int_enable()
356 if (irq_type == GPIO_RZ_INT_EDGE_RISING || irq_type == GPIO_RZ_INT_EDGE_FALLING) { in gpio_rz_int_enable()
370 intc_rz_ext_irq_set_type(eirq_dev, irq_type); in gpio_rz_int_enable()
387 uint8_t irq_type = 0; in gpio_rz_pin_interrupt_configure() local
412 irq_type = GPIO_RZ_INT_EDGE_FALLING; in gpio_rz_pin_interrupt_configure()
414 irq_type = GPIO_RZ_INT_EDGE_RISING; in gpio_rz_pin_interrupt_configure()
416 irq_type = GPIO_RZ_INT_BOTH_EDGE; in gpio_rz_pin_interrupt_configure()
420 irq_type = GPIO_RZ_INT_LEVEL_LOW; in gpio_rz_pin_interrupt_configure()
[all …]
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| D | gpio_mfxstm32l152.c | 434 uint32_t irq_event, irq_type; in mfxstm32l152_pin_interrupt_configure() local
478 ret = read_port_regs(dev, REG_GPIO_IRQ_TYPE, &irq_type); in mfxstm32l152_pin_interrupt_configure()
486 irq_type |= BIT(pin); in mfxstm32l152_pin_interrupt_configure()
488 irq_type &= ~BIT(pin); in mfxstm32l152_pin_interrupt_configure()
491 ret = write_port_regs(dev, REG_GPIO_IRQ_TYPE, irq_type); in mfxstm32l152_pin_interrupt_configure()
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| /Zephyr-latest/include/zephyr/drivers/pcie/endpoint/ |
| D | pcie_ep.h | 69 enum pci_ep_irq_type irq_type,
188 enum pci_ep_irq_type irq_type, in pcie_ep_raise_irq() argument
193 return api->raise_irq(dev, irq_type, irq_num); in pcie_ep_raise_irq()
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| /Zephyr-latest/drivers/xen/dom0/ |
| D | domctl.c | 241 int xen_domctl_bind_pt_irq(int domid, uint32_t machine_irq, uint8_t irq_type, in xen_domctl_bind_pt_irq() argument
251 switch (irq_type) { in xen_domctl_bind_pt_irq()
253 bind->irq_type = irq_type; in xen_domctl_bind_pt_irq()
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| /Zephyr-latest/drivers/i2s/ |
| D | i2s_litex.c | 118 static void i2s_irq_enable(uintptr_t reg, int irq_type) in i2s_irq_enable() argument
120 __ASSERT_NO_MSG(irq_type == I2S_EV_READY || irq_type == I2S_EV_ERROR); in i2s_irq_enable()
124 litex_write8(reg_data | irq_type, reg + I2S_EV_ENABLE_OFFSET); in i2s_irq_enable()
133 static void i2s_irq_disable(uintptr_t reg, int irq_type) in i2s_irq_disable() argument
135 __ASSERT_NO_MSG(irq_type == I2S_EV_READY || irq_type == I2S_EV_ERROR); in i2s_irq_disable()
139 litex_write8(reg_data & ~(irq_type), reg + I2S_EV_ENABLE_OFFSET); in i2s_irq_disable()
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| /Zephyr-latest/include/zephyr/xen/dom0/ |
| D | domctl.h | 30 int xen_domctl_bind_pt_irq(int domid, uint32_t machine_irq, uint8_t irq_type, uint8_t bus,
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| /Zephyr-latest/drivers/pcie/endpoint/ |
| D | pcie_ep_iproc.c | 133 enum pci_ep_irq_type irq_type, in iproc_pcie_raise_irq() argument
142 switch (irq_type) { in iproc_pcie_raise_irq()
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| /Zephyr-latest/include/zephyr/xen/public/ |
| D | domctl.h | 343 uint32_t irq_type; /* enum pt_irq_type */ member
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| /Zephyr-latest/scripts/dts/ |
| D | gen_defines.py | 386 irq_type = irq.data["type"]
388 if irq_type == 0: # GIC_SPI
390 if irq_type == 1: # GIC_PPI
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