1/* 2 * Copyright (c) 2024 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <mem.h> 8#include <nordic/nrf_common.dtsi> 9#include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h> 10#include <zephyr/dt-bindings/regulator/nrf5x.h> 11 12/delete-node/ &sw_pwm; 13 14/ { 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 cpus { 19 #address-cells = <1>; 20 #size-cells = <0>; 21 22 cpuapp: cpu@0 { 23 compatible = "arm,cortex-m33f"; 24 reg = <0>; 25 device_type = "cpu"; 26 clocks = <&hfpll>; 27 #address-cells = <1>; 28 #size-cells = <1>; 29 30 itm: itm@e0000000 { 31 compatible = "arm,armv8m-itm"; 32 reg = <0xe0000000 0x1000>; 33 swo-ref-frequency = <DT_FREQ_M(128)>; 34 }; 35 }; 36 }; 37 38 clocks { 39 pclk: pclk { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <DT_FREQ_M(16)>; 43 }; 44 45 lfxo: lfxo { 46 compatible = "nordic,nrf-lfxo"; 47 #clock-cells = <0>; 48 clock-frequency = <32768>; 49 }; 50 51 hfxo: hfxo { 52 compatible = "nordic,nrf-hfxo"; 53 #clock-cells = <0>; 54 clock-frequency = <DT_FREQ_M(32)>; 55 }; 56 57 hfpll: hfpll { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <DT_FREQ_M(128)>; 61 }; 62 }; 63 64 soc { 65 #address-cells = <1>; 66 #size-cells = <1>; 67 68 ficr: ficr@ffc000 { 69 compatible = "nordic,nrf-ficr"; 70 reg = <0xffc000 0x1000>; 71 #nordic,ficr-cells = <1>; 72 }; 73 74 uicr: uicr@ffd000 { 75 compatible = "nordic,nrf-uicr"; 76 reg = <0xffd000 0x1000>; 77 }; 78 79 cpuapp_sram: memory@20000000 { 80 compatible = "mmio-sram"; 81 reg = <0x20000000 DT_SIZE_K(511)>; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 ranges = <0x0 0x20000000 0x7fc00>; 85 }; 86 87 global_peripherals: peripheral@50000000 { 88 ranges = <0x0 0x50000000 0x10000000>; 89 #address-cells = <1>; 90 #size-cells = <1>; 91 92 dppic00: dppic@42000 { 93 compatible = "nordic,nrf-dppic"; 94 reg = <0x42000 0x808>; 95 status = "disabled"; 96 }; 97 98 ppib00: ppib@44000 { 99 compatible = "nordic,nrf-ppib"; 100 reg = <0x44000 0x1000>; 101 status = "disabled"; 102 }; 103 104 ppib01: ppib@45000 { 105 compatible = "nordic,nrf-ppib"; 106 reg = <0x45000 0x1000>; 107 status = "disabled"; 108 }; 109 110 spi00: spi@4d000 { 111 /* 112 * This spi node can be either SPIM or SPIS, 113 * for the user to pick: 114 * compatible = "nordic,nrf-spim" or 115 * "nordic,nrf-spis". 116 */ 117 compatible = "nordic,nrf-spim"; 118 #address-cells = <1>; 119 #size-cells = <0>; 120 reg = <0x4d000 0x1000>; 121 interrupts = <77 NRF_DEFAULT_IRQ_PRIORITY>; 122 max-frequency = <DT_FREQ_M(32)>; 123 easydma-maxcnt-bits = <16>; 124 rx-delay-supported; 125 rx-delay = <1>; 126 status = "disabled"; 127 }; 128 129 uart00: uart@4d000 { 130 compatible = "nordic,nrf-uarte"; 131 reg = <0x4d000 0x1000>; 132 interrupts = <77 NRF_DEFAULT_IRQ_PRIORITY>; 133 clocks = <&hfpll>; 134 status = "disabled"; 135 endtx-stoptx-supported; 136 frame-timeout-supported; 137 }; 138 139 gpio2: gpio@50400 { 140 compatible = "nordic,nrf-gpio"; 141 gpio-controller; 142 reg = <0x50400 0x300>; 143 #gpio-cells = <2>; 144 ngpios = <11>; 145 status = "disabled"; 146 port = <2>; 147 }; 148 149 timer00: timer@55000 { 150 compatible = "nordic,nrf-timer"; 151 status = "disabled"; 152 reg = <0x55000 0x1000>; 153 cc-num = <6>; 154 max-bit-width = <32>; 155 interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>; 156 clocks = <&hfpll>; 157 prescaler = <0>; 158 }; 159 160 dppic10: dppic@82000 { 161 compatible = "nordic,nrf-dppic"; 162 reg = <0x82000 0x808>; 163 status = "disabled"; 164 }; 165 166 ppib10: ppib@83000 { 167 compatible = "nordic,nrf-ppib"; 168 reg = <0x83000 0x1000>; 169 status = "disabled"; 170 }; 171 172 ppib11: ppib@84000 { 173 compatible = "nordic,nrf-ppib"; 174 reg = <0x84000 0x1000>; 175 status = "disabled"; 176 }; 177 178 timer10: timer@85000 { 179 compatible = "nordic,nrf-timer"; 180 status = "disabled"; 181 reg = <0x85000 0x1000>; 182 cc-num = <8>; 183 max-bit-width = <32>; 184 interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>; 185 clocks = <&hfxo>; 186 prescaler = <0>; 187 }; 188 189 egu10: egu@87000 { 190 compatible = "nordic,nrf-egu"; 191 reg = <0x87000 0x1000>; 192 interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>; 193 status = "disabled"; 194 }; 195 196 radio: radio@8a000 { 197 compatible = "nordic,nrf-radio"; 198 reg = <0x8a000 0x1000>; 199 interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>; 200 status = "disabled"; 201 dfe-supported; 202 ieee802154-supported; 203 ble-2mbps-supported; 204 ble-coded-phy-supported; 205 206 ieee802154: ieee802154 { 207 compatible = "nordic,nrf-ieee802154"; 208 status = "disabled"; 209 }; 210 211 /* Note: In the nRF Connect SDK the SoftDevice Controller 212 * is added and set as the default Bluetooth Controller. 213 */ 214 bt_hci_controller: bt_hci_controller { 215 compatible = "zephyr,bt-hci-ll-sw-split"; 216 status = "disabled"; 217 }; 218 }; 219 220 dppic20: dppic@c2000 { 221 compatible = "nordic,nrf-dppic"; 222 reg = <0xc2000 0x808>; 223 status = "disabled"; 224 }; 225 226 ppib20: ppib@c3000 { 227 compatible = "nordic,nrf-ppib"; 228 reg = <0xc3000 0x1000>; 229 status = "disabled"; 230 }; 231 232 ppib21: ppib@c4000 { 233 compatible = "nordic,nrf-ppib"; 234 reg = <0xc4000 0x1000>; 235 status = "disabled"; 236 }; 237 238 ppib22: ppib@c5000 { 239 compatible = "nordic,nrf-ppib"; 240 reg = <0xc5000 0x1000>; 241 status = "disabled"; 242 }; 243 244 i2c20: i2c@c6000 { 245 compatible = "nordic,nrf-twim"; 246 #address-cells = <1>; 247 #size-cells = <0>; 248 reg = <0xc6000 0x1000>; 249 interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; 250 easydma-maxcnt-bits = <16>; 251 status = "disabled"; 252 zephyr,pm-device-runtime-auto; 253 }; 254 255 spi20: spi@c6000 { 256 /* 257 * This spi node can be either SPIM or SPIS, 258 * for the user to pick: 259 * compatible = "nordic,nrf-spim" or 260 * "nordic,nrf-spis". 261 */ 262 compatible = "nordic,nrf-spim"; 263 #address-cells = <1>; 264 #size-cells = <0>; 265 reg = <0xc6000 0x1000>; 266 interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; 267 max-frequency = <DT_FREQ_M(8)>; 268 easydma-maxcnt-bits = <16>; 269 rx-delay-supported; 270 rx-delay = <1>; 271 status = "disabled"; 272 }; 273 274 uart20: uart@c6000 { 275 compatible = "nordic,nrf-uarte"; 276 reg = <0xc6000 0x1000>; 277 interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; 278 status = "disabled"; 279 endtx-stoptx-supported; 280 frame-timeout-supported; 281 }; 282 283 i2c21: i2c@c7000 { 284 compatible = "nordic,nrf-twim"; 285 #address-cells = <1>; 286 #size-cells = <0>; 287 reg = <0xc7000 0x1000>; 288 interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; 289 easydma-maxcnt-bits = <16>; 290 status = "disabled"; 291 zephyr,pm-device-runtime-auto; 292 }; 293 294 spi21: spi@c7000 { 295 /* 296 * This spi node can be either SPIM or SPIS, 297 * for the user to pick: 298 * compatible = "nordic,nrf-spim" or 299 * "nordic,nrf-spis". 300 */ 301 compatible = "nordic,nrf-spim"; 302 #address-cells = <1>; 303 #size-cells = <0>; 304 reg = <0xc7000 0x1000>; 305 interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; 306 max-frequency = <DT_FREQ_M(8)>; 307 easydma-maxcnt-bits = <16>; 308 rx-delay-supported; 309 rx-delay = <1>; 310 status = "disabled"; 311 }; 312 313 uart21: uart@c7000 { 314 compatible = "nordic,nrf-uarte"; 315 reg = <0xc7000 0x1000>; 316 interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; 317 status = "disabled"; 318 endtx-stoptx-supported; 319 frame-timeout-supported; 320 }; 321 322 i2c22: i2c@c8000 { 323 compatible = "nordic,nrf-twim"; 324 #address-cells = <1>; 325 #size-cells = <0>; 326 reg = <0xc8000 0x1000>; 327 interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; 328 easydma-maxcnt-bits = <16>; 329 status = "disabled"; 330 zephyr,pm-device-runtime-auto; 331 }; 332 333 spi22: spi@c8000 { 334 /* 335 * This spi node can be either SPIM or SPIS, 336 * for the user to pick: 337 * compatible = "nordic,nrf-spim" or 338 * "nordic,nrf-spis". 339 */ 340 compatible = "nordic,nrf-spim"; 341 #address-cells = <1>; 342 #size-cells = <0>; 343 reg = <0xc8000 0x1000>; 344 interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; 345 max-frequency = <DT_FREQ_M(8)>; 346 easydma-maxcnt-bits = <16>; 347 rx-delay-supported; 348 rx-delay = <1>; 349 status = "disabled"; 350 }; 351 352 uart22: uart@c8000 { 353 compatible = "nordic,nrf-uarte"; 354 reg = <0xc8000 0x1000>; 355 interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; 356 status = "disabled"; 357 endtx-stoptx-supported; 358 frame-timeout-supported; 359 }; 360 361 egu20: egu@c9000 { 362 compatible = "nordic,nrf-egu"; 363 reg = <0xc9000 0x1000>; 364 interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>; 365 status = "disabled"; 366 }; 367 368 timer20: timer@ca000 { 369 compatible = "nordic,nrf-timer"; 370 status = "disabled"; 371 reg = <0xca000 0x1000>; 372 cc-num = <6>; 373 max-bit-width = <32>; 374 interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>; 375 prescaler = <0>; 376 }; 377 378 timer21: timer@cb000 { 379 compatible = "nordic,nrf-timer"; 380 status = "disabled"; 381 reg = <0xcb000 0x1000>; 382 cc-num = <6>; 383 max-bit-width = <32>; 384 interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>; 385 prescaler = <0>; 386 }; 387 388 timer22: timer@cc000 { 389 compatible = "nordic,nrf-timer"; 390 status = "disabled"; 391 reg = <0xcc000 0x1000>; 392 cc-num = <6>; 393 max-bit-width = <32>; 394 interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>; 395 prescaler = <0>; 396 }; 397 398 timer23: timer@cd000 { 399 compatible = "nordic,nrf-timer"; 400 status = "disabled"; 401 reg = <0xcd000 0x1000>; 402 cc-num = <6>; 403 max-bit-width = <32>; 404 interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>; 405 prescaler = <0>; 406 }; 407 408 timer24: timer@ce000 { 409 compatible = "nordic,nrf-timer"; 410 status = "disabled"; 411 reg = <0xce000 0x1000>; 412 cc-num = <6>; 413 max-bit-width = <32>; 414 interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>; 415 prescaler = <0>; 416 }; 417 418 pdm20: pdm@d0000 { 419 compatible = "nordic,nrf-pdm"; 420 status = "disabled"; 421 reg = <0xd0000 0x1000>; 422 interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>; 423 }; 424 425 pdm21: pdm@d1000 { 426 compatible = "nordic,nrf-pdm"; 427 status = "disabled"; 428 reg = <0xd1000 0x1000>; 429 interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>; 430 }; 431 432 pwm20: pwm@d2000 { 433 compatible = "nordic,nrf-pwm"; 434 status = "disabled"; 435 reg = <0xd2000 0x1000>; 436 interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>; 437 #pwm-cells = <3>; 438 }; 439 440 pwm21: pwm@d3000 { 441 compatible = "nordic,nrf-pwm"; 442 status = "disabled"; 443 reg = <0xd3000 0x1000>; 444 interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>; 445 #pwm-cells = <3>; 446 }; 447 448 pwm22: pwm@d4000 { 449 compatible = "nordic,nrf-pwm"; 450 status = "disabled"; 451 reg = <0xd4000 0x1000>; 452 interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>; 453 #pwm-cells = <3>; 454 }; 455 456 adc: adc@d5000 { 457 compatible = "nordic,nrf-saadc"; 458 reg = <0xd5000 0x1000>; 459 interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>; 460 status = "disabled"; 461 #io-channel-cells = <1>; 462 zephyr,pm-device-runtime-auto; 463 }; 464 465 nfct: nfct@d6000 { 466 compatible = "nordic,nrf-nfct"; 467 reg = <0xd6000 0x1000>; 468 interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>; 469 status = "disabled"; 470 }; 471 472 temp: temp@d7000 { 473 compatible = "nordic,nrf-temp"; 474 reg = <0xd7000 0x1000>; 475 interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>; 476 status = "disabled"; 477 }; 478 479 gpio1: gpio@d8200 { 480 compatible = "nordic,nrf-gpio"; 481 gpio-controller; 482 reg = <0xd8200 0x300>; 483 #gpio-cells = <2>; 484 ngpios = <16>; 485 status = "disabled"; 486 port = <1>; 487 gpiote-instance = <&gpiote20>; 488 }; 489 490 gpiote20: gpiote@da000 { 491 compatible = "nordic,nrf-gpiote"; 492 reg = <0xda000 0x1000>; 493 status = "disabled"; 494 instance = <20>; 495 }; 496 497 qdec20: qdec@e0000 { 498 compatible = "nordic,nrf-qdec"; 499 reg = <0xe0000 0x1000>; 500 interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>; 501 status = "disabled"; 502 }; 503 504 qdec21: qdec@e1000 { 505 compatible = "nordic,nrf-qdec"; 506 reg = <0xe1000 0x1000>; 507 interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>; 508 status = "disabled"; 509 }; 510 511 grtc: grtc@e2000 { 512 compatible = "nordic,nrf-grtc"; 513 reg = <0xe2000 0x1000>; 514 cc-num = <12>; 515 clocks = <&lfxo>, <&pclk>; 516 clock-names = "lfclock", "hfclock"; 517 status = "disabled"; 518 }; 519 520 i2c23: i2c@ed000 { 521 compatible = "nordic,nrf-twim"; 522 #address-cells = <1>; 523 #size-cells = <0>; 524 reg = <0xed000 0x1000>; 525 interrupts = <237 NRF_DEFAULT_IRQ_PRIORITY>; 526 easydma-maxcnt-bits = <16>; 527 status = "disabled"; 528 zephyr,pm-device-runtime-auto; 529 }; 530 531 spi23: spi@ed000 { 532 /* 533 * This spi node can be either SPIM or SPIS, 534 * for the user to pick: 535 * compatible = "nordic,nrf-spim" or 536 * "nordic,nrf-spis". 537 */ 538 compatible = "nordic,nrf-spim"; 539 #address-cells = <1>; 540 #size-cells = <0>; 541 reg = <0xed000 0x1000>; 542 interrupts = <237 NRF_DEFAULT_IRQ_PRIORITY>; 543 max-frequency = <DT_FREQ_M(8)>; 544 easydma-maxcnt-bits = <16>; 545 rx-delay-supported; 546 rx-delay = <1>; 547 status = "disabled"; 548 }; 549 550 uart23: uart@ed000 { 551 compatible = "nordic,nrf-uarte"; 552 reg = <0xed000 0x1000>; 553 interrupts = <237 NRF_DEFAULT_IRQ_PRIORITY>; 554 status = "disabled"; 555 endtx-stoptx-supported; 556 frame-timeout-supported; 557 }; 558 559 i2c24: i2c@ee000 { 560 compatible = "nordic,nrf-twim"; 561 #address-cells = <1>; 562 #size-cells = <0>; 563 reg = <0xee000 0x1000>; 564 interrupts = <238 NRF_DEFAULT_IRQ_PRIORITY>; 565 easydma-maxcnt-bits = <16>; 566 status = "disabled"; 567 zephyr,pm-device-runtime-auto; 568 }; 569 570 spi24: spi@ee000 { 571 /* 572 * This spi node can be either SPIM or SPIS, 573 * for the user to pick: 574 * compatible = "nordic,nrf-spim" or 575 * "nordic,nrf-spis". 576 */ 577 compatible = "nordic,nrf-spim"; 578 #address-cells = <1>; 579 #size-cells = <0>; 580 reg = <0xee000 0x1000>; 581 interrupts = <238 NRF_DEFAULT_IRQ_PRIORITY>; 582 max-frequency = <DT_FREQ_M(8)>; 583 easydma-maxcnt-bits = <16>; 584 rx-delay-supported; 585 rx-delay = <1>; 586 status = "disabled"; 587 }; 588 589 uart24: uart@ee000 { 590 compatible = "nordic,nrf-uarte"; 591 reg = <0xee000 0x1000>; 592 interrupts = <238 NRF_DEFAULT_IRQ_PRIORITY>; 593 status = "disabled"; 594 endtx-stoptx-supported; 595 frame-timeout-supported; 596 }; 597 598 dppic30: dppic@102000 { 599 compatible = "nordic,nrf-dppic"; 600 reg = <0x102000 0x808>; 601 status = "disabled"; 602 }; 603 604 ppib30: ppib@103000 { 605 compatible = "nordic,nrf-ppib"; 606 reg = <0x103000 0x1000>; 607 status = "disabled"; 608 }; 609 610 i2c30: i2c@104000 { 611 compatible = "nordic,nrf-twim"; 612 #address-cells = <1>; 613 #size-cells = <0>; 614 reg = <0x104000 0x1000>; 615 interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; 616 easydma-maxcnt-bits = <16>; 617 status = "disabled"; 618 zephyr,pm-device-runtime-auto; 619 }; 620 621 spi30: spi@104000 { 622 /* 623 * This spi node can be either SPIM or SPIS, 624 * for the user to pick: 625 * compatible = "nordic,nrf-spim" or 626 * "nordic,nrf-spis". 627 */ 628 compatible = "nordic,nrf-spim"; 629 #address-cells = <1>; 630 #size-cells = <0>; 631 reg = <0x104000 0x1000>; 632 interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; 633 max-frequency = <DT_FREQ_M(8)>; 634 easydma-maxcnt-bits = <16>; 635 rx-delay-supported; 636 rx-delay = <1>; 637 status = "disabled"; 638 }; 639 640 uart30: uart@104000 { 641 compatible = "nordic,nrf-uarte"; 642 reg = <0x104000 0x1000>; 643 interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; 644 status = "disabled"; 645 endtx-stoptx-supported; 646 frame-timeout-supported; 647 }; 648 649 wdt30: watchdog@108000 { 650 compatible = "nordic,nrf-wdt"; 651 reg = <0x108000 0x620>; 652 interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>; 653 status = "disabled"; 654 }; 655 656 wdt31: watchdog@109000 { 657 compatible = "nordic,nrf-wdt"; 658 reg = <0x109000 0x620>; 659 interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>; 660 status = "disabled"; 661 }; 662 663 gpio0: gpio@10a000 { 664 compatible = "nordic,nrf-gpio"; 665 gpio-controller; 666 reg = <0x10a000 0x300>; 667 #gpio-cells = <2>; 668 ngpios = <5>; 669 status = "disabled"; 670 port = <0>; 671 gpiote-instance = <&gpiote30>; 672 }; 673 674 gpiote30: gpiote@10c000 { 675 compatible = "nordic,nrf-gpiote"; 676 reg = <0x10c000 0x1000>; 677 status = "disabled"; 678 instance = <30>; 679 }; 680 681 clock: clock@10e000 { 682 compatible = "nordic,nrf-clock"; 683 reg = <0x10e000 0x1000>; 684 interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; 685 status = "disabled"; 686 }; 687 688 power: power@10e000 { 689 compatible = "nordic,nrf-power"; 690 reg = <0x10e000 0x1000>; 691 ranges = <0x0 0x10e000 0x1000>; 692 interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; 693 status = "disabled"; 694 #address-cells = <1>; 695 #size-cells = <1>; 696 697 gpregret1: gpregret1@51c { 698 #address-cells = <1>; 699 #size-cells = <1>; 700 compatible = "nordic,nrf-gpregret"; 701 reg = <0x51c 0x1>; 702 status = "disabled"; 703 }; 704 705 gpregret2: gpregret2@520 { 706 #address-cells = <1>; 707 #size-cells = <1>; 708 compatible = "nordic,nrf-gpregret"; 709 reg = <0x520 0x1>; 710 status = "disabled"; 711 }; 712 }; 713 714 regulators: regulator@120000 { 715 compatible = "nordic,nrf54l-regulators"; 716 reg = <0x120000 0x1000>; 717 status = "disabled"; 718 #address-cells = <1>; 719 #size-cells = <1>; 720 721 vregmain: regulator@120600 { 722 compatible = "nordic,nrf5x-regulator"; 723 reg = <0x120600 0x1>; 724 status = "disabled"; 725 regulator-name = "VREGMAIN"; 726 regulator-initial-mode = <NRF5X_REG_MODE_LDO>; 727 }; 728 }; 729 }; 730 731 rram_controller: rram-controller@5004e000 { 732 compatible = "nordic,rram-controller"; 733 reg = <0x5004e000 0x1000>; 734 interrupts = <78 NRF_DEFAULT_IRQ_PRIORITY>; 735 #address-cells = <1>; 736 #size-cells = <1>; 737 738 cpuapp_rram: rram@0 { 739 compatible = "soc-nv-flash"; 740 reg = <0x0 DT_SIZE_K(2028)>; 741 erase-block-size = <4096>; 742 write-block-size = <16>; 743 }; 744 }; 745 746 cpuapp_ppb: cpuapp-ppb-bus { 747 #address-cells = <1>; 748 #size-cells = <1>; 749 750 cpuapp_nvic: interrupt-controller@e000e100 { 751 #address-cells = <1>; 752 compatible = "arm,v8m-nvic"; 753 reg = <0xe000e100 0xc00>; 754 arm,num-irq-priority-bits = <3>; 755 interrupt-controller; 756 #interrupt-cells = <2>; 757 }; 758 759 cpuapp_systick: timer@e000e010 { 760 compatible = "arm,armv8m-systick"; 761 reg = <0xe000e010 0x10>; 762 status = "disabled"; 763 }; 764 }; 765 }; 766}; 767
