1.. zephyr:board:: verdin_imx8mp
2
3Overview
4********
5
6The Verdin iMX8M Plus is a Computer on Module (CoM) developed by Toradex. It is based on the NXP®
7i.MX 8M Plus family of processors (or System on Chips - SoCs).
8
9The Verdin iMX8M Plus family consists of:
10
11+-------------------------------------------------+-----------------------+
12| CoM                                             | SoC                   |
13+=================================================+=======================+
14| Verdin iMX8M Plus Quad 8GB Wi-Fi / Bluetooth IT | i.MX 8M Plus Quad     |
15+-------------------------------------------------+-----------------------+
16| Verdin iMX8M Plus Quad 4GB Wi-Fi / Bluetooth IT | i.MX 8M Plus Quad     |
17+-------------------------------------------------+-----------------------+
18| Verdin iMX8M Plus Quad 4GB IT                   | i.MX 8M Plus Quad     |
19+-------------------------------------------------+-----------------------+
20| Verdin iMX8M Plus Quad 2GB Wi-Fi / Bluetooth IT | i.MX 8M Plus Quad     |
21+-------------------------------------------------+-----------------------+
22| Verdin iMX8M Plus QuadLite 1GB IT               | i.MX 8M Plus QuadLite |
23+-------------------------------------------------+-----------------------+
24
25Quoting NXP:
26
27   The i.MX 8M Plus family focuses on machine learning and vision, advanced multimedia, and
28   industrial automation with high reliability. It is built to meet the needs of Smart Home,
29   Building, City and Industry 4.0 applications.
30
31The Verdin iMX8M Plus integrates a total of 4 Arm Cortex™-A53 CPUs, operating at 1.6 GHz, alongside
32a single Arm Cortex™-M7F microcontroller operating at 800 MHz.
33
34Regarding the Cortex-A53 cluster, it employs the ARMv8-A architecture as a mid-range and
35energy-efficient processor. With four cores in this cluster, each core is equipped with its own L1
36memory system. Moreover, the cluster incorporates a unified L2 cache that offers supplementary
37functions. This cache is housed within a single APR region. Facilitating debugging processes, the
38cores support both real-time trace through the ETM system and static debugging via JTAG.
39Furthermore, the platform features support for real-time trace capabilities, achieved through ARM's
40CoreSight ETM modules, and also enables cross-triggering by utilizing CTI and CTM modules.
41
42The Arm® Cortex®-M7 microcontroller is indicated for Real-time control, combining high-performance
43with a minimal interrupt latency. It stands out for its compatibility with existing Cortex-M profile
44processors. The microcontroller employs an efficient in-order super-scalar pipeline, allowing
45dual-issued instructions such as load/load and load/store pairs, thanks to its multiple memory
46interfaces. These interfaces encompass Tightly-Coupled Memory (TCM), Harvard caches, and an AXI
47master interface. The Arm Cortex-M7 Platform boasts features like a 32 KB L1 Instruction Cache, 32
48KB L1 Data Cache, Floating Point Unit (FPU) with FPv5 architecture support, and an Internal Trace
49(TRC) mechanism. Furthermore, the chip supports 160 IRQs, and integrates crucial Arm CoreSight
50components including ETM and CTI, dedicated to facilitating debug and trace functions.
51
52Hardware
53********
54
55- SoC name: NXP® i.MX 8M Plus
56- CPU Type:	4x Arm Cortex™-A53 (1.6 GHz)
57- Microcontroller:	1x Arm Cortex™-M7F (800 MHz)
58
59- Memory:
60
61  - RAM -> A53: 1GB, 2GB, 4GB or 8GB
62  - RAM -> M7: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
63  - Flash -> A53: Up to 32GB eMMC
64
65- Connectivity:
66
67  - USB 3.1: 1x Host / 1x OTG (Gen 1)
68  - USB 2.0: 1x Host / 1x OTG
69  - Ethernet Gigabit with TSN (+2nd RGMII)
70  - Wi-Fi Dual-band 802.11ac 2x2 MU-MIMO
71  - Bluetooth 5
72  - 5x I2C
73  - 3x SPI
74  - 1 QSPI
75  - 4x UART
76  - Up to 92 GPIO
77  - 4x Analog Input
78  - 2x CAN (FlexCAN)
79
80- Multimedia:
81
82   - Neural Processing Unit (NPU)
83   - Image Signal Processor (ISP)
84   - 2D and 3D acceleration
85   - HDMI, MIPI-DSI and MIPI-CSI interface
86
87For more information about the Verdin iMX8M Plus and the i.MX 8M Plus SoC refer to these links:
88
89- `i.MX 8M Plus Applications Processor page`_
90- `Verdin iMX8M Plus homepage`_
91- `Verdin iMX8M Plus developer page`_
92- `Verdin Development Board developer page`_
93- `Verdin iMX8M Plus Datasheet`_
94- `Verdin Development Board Datasheet`_
95
96Supported Features
97==================
98
99The Zephyr verdin_imx8mp_m7 board configuration supports the following hardware features:
100
101+-----------+------------+-------------------------------------+
102| Interface | Controller | Driver/Component                    |
103+===========+============+=====================================+
104| NVIC      | on-chip    | nested vector interrupt controller  |
105+-----------+------------+-------------------------------------+
106| SYSTICK   | on-chip    | systick                             |
107+-----------+------------+-------------------------------------+
108| CLOCK     | on-chip    | clock_control                       |
109+-----------+------------+-------------------------------------+
110| PINMUX    | on-chip    | pinmux                              |
111+-----------+------------+-------------------------------------+
112| UART      | on-chip    | serial port-polling;                |
113|           |            | serial port-interrupt               |
114+-----------+------------+-------------------------------------+
115| GPIO      | on-chip    | GPIO output                         |
116|           |            | GPIO input                          |
117+-----------+------------+-------------------------------------+
118
119The default configuration can be found in the defconfig file:
120
121- :zephyr_file:`boards/toradex/verdin_imx8mp/verdin_imx8mp_mimx8ml8_m7_defconfig`, if you choose to use
122  the ITCM memory.
123
124- :zephyr_file:`boards/toradex/verdin_imx8mp/verdin_imx8mp_mimx8ml8_m7_ddr_defconfig`, if you choose to use
125  the DDR memory.
126
127It is recommended to disable peripherals used by the M7 core on the Linux host.
128
129Other hardware features are not currently supported by the port.
130
131Connections and IOs
132===================
133
134UART
135----
136
137Zephyr is configured to use the UART4 by default, which is connected to the FTDI USB converter on
138most Toradex carrier boards.
139
140This is also the UART connected to WiFi/BT chip in modules that have the WiFi/BT chip. Therefore, if
141UART4 is used, WiFI/BT will not work properly.
142
143If the WiFi/BT is needed, then another UART should be used for Zephyr (UART1 for example). You can
144change the UART by changing the ``zephyr,console`` and ``zephyr,shell-uart`` in the
145:zephyr_file:`boards/toradex/verdin_imx8mp/verdin_imx8mp_mimx8ml8_m7.dts` or
146:zephyr_file:`boards/toradex/verdin_imx8mp/verdin_imx8mp_mimx8ml8_m7_ddr.dts` file.
147
148+---------------+-----------------+---------------------------+
149| Board Name    | SoC Name        | Usage                     |
150+===============+=================+===========================+
151| UART_1        | UART1           | General purpose UART      |
152+---------------+-----------------+---------------------------+
153| UART_4        | UART4           | Cortex-M4 debug UART      |
154+---------------+-----------------+---------------------------+
155
156GPIO
157----
158
159All the GPIO banks available are enabled in the :zephyr_file:`dts/arm/nxp/nxp_imx8ml_m7.dtsi`.
160
161System Clock
162============
163
164The M7 Core is configured to run at a 800 MHz clock speed.
165
166Serial Port
167===========
168
169The i.MX8M Plus SoC has four UARTs. UART_4 is configured for the console and the remaining are not
170used/tested.
171
172Programming and Debugging
173*************************
174
175The Verdin iMX8M Plus board doesn't have QSPI flash for the M7, and it needs to be started by the
176A53 core. The A53 core is responsible to load the M7 binary application into the RAM, put the M7 in
177reset, set the M7 Program Counter and Stack Pointer, and get the M7 out of reset. The A53 can
178perform these steps at bootloader level or after the Linux system has booted.
179
180The M7 can use up to 3 different RAMs (currently, only two configurations are supported: ITCM and
181DDR). These are the memory mapping for A53 and M7:
182
183+------------+-------------------------+------------------------+-----------------------+----------------------+
184| Region     | Cortex-A53              | Cortex-M7 (System Bus) | Cortex-M7 (Code Bus)  | Size                 |
185+============+=========================+========================+=======================+======================+
186| OCRAM      | 0x00900000-0x0098FFFF   | 0x20200000-0x2028FFFF  | 0x00900000-0x0098FFFF | 576KB                |
187+------------+-------------------------+------------------------+-----------------------+----------------------+
188| DTCM       | 0x00800000-0x0081FFFF   | 0x20000000-0x2001FFFF  |                       | 128KB                |
189+------------+-------------------------+------------------------+-----------------------+----------------------+
190| ITCM       | 0x007E0000-0x007FFFFF   |                        | 0x00000000-0x0001FFFF | 128KB                |
191+------------+-------------------------+------------------------+-----------------------+----------------------+
192| OCRAM_S    | 0x00180000-0x00188FFF   | 0x20180000-0x20188FFF  | 0x00180000-0x00188FFF | 36KB                 |
193+------------+-------------------------+------------------------+-----------------------+----------------------+
194| DDR        | 0x80000000-0x803FFFFF   | 0x80200000-0x803FFFFF  | 0x80000000-0x801FFFFF | 2MB                  |
195+------------+-------------------------+------------------------+-----------------------+----------------------+
196
197For more information about memory mapping see the `i.MX 8M Plus Applications Processor Reference
198Manual`_  (section 2.1 to 2.3)
199
200At compilation time you have to choose which RAM will be used. To facilitate this process, there are
201two targets available:
202
203- ``verdin_imx8mp/mimx8ml8/m7``, which uses the ITCM configuration.
204- ``verdin_imx8mp/mimx8ml8/m7/ddr``, which uses the DDR configuration.
205
206
207Starting the Cortex-M7 via U-Boot
208=================================
209
210Load and run Zephyr on M7 from A53 using u-boot by copying the compiled ``zephyr.bin`` to the first
211FAT partition of the SD card and plug the SD card into the board. Power it up and stop the u-boot
212execution at prompt.
213
214Load the M7 binary onto the desired memory and start its execution using:
215
216ITCM
217====
218
219Loading the binary from an EXT4 partition:
220
221.. code-block:: shell
222
223   ext4load mmc 2:2 ${loadaddr} /<path-to-binary>/zephyr.bin
224   cp.b ${loadaddr} 0x7e0000 <size_of_binary_in_bytes>
225   bootaux 0x7e0000
226
227DDR
228===
229
230Loading the binary from an EXT4 partition:
231
232.. code-block:: shell
233
234   ext4load mmc 2:2 ${loadaddr} /<path-to-binary>/zephyr.bin
235   cp.b ${loadaddr} 0x80000000 <size_of_binary_in_bytes>
236   bootaux 0x80000000
237
238Debugging
239=========
240
241Toradex Verdin iMX8M Plus SoM can be debugged by connecting an external JLink JTAG debugger to the
242X56 debug connector and to the PC, or simply connecting a USB-C to X66 on the Verdin Development
243Board. Then, the application can be debugged using the usual way.
244
245Here is an example for the :zephyr:code-sample:`hello_world` application.
246
247.. zephyr-app-commands::
248   :zephyr-app: samples/hello_world
249   :board: verdin_imx8mp/mimx8ml8/m7/ddr
250   :goals: debug
251
252Open a serial terminal, step through the application in your debugger, and you
253should see the following message in the terminal:
254
255.. code-block:: console
256
257   *** Booting Zephyr OS build zephyr-v3.4.0-2300-g03905f7e55d2  ***
258   Hello World! verdin_imx8mp
259
260References
261==========
262
263- `How to Load Compiled Binaries into Cortex-M`_
264- `Cortex-M JTAG Debugging`_
265- `NXP website`_
266
267.. _NXP website:
268   https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i-mx-8m-plus-applications-processor:8MPLUSLPD4-EVK
269
270.. _i.MX 8M Plus Applications Processor Reference Manual:
271   https://www.nxp.com/webapp/Download?colCode=IMX8MPRM
272
273.. _How to Load Compiled Binaries into Cortex-M:
274   https://developer.toradex.com/software/real-time/cortex-m/how-to-load-binaries
275
276.. _Cortex-M JTAG Debugging:
277   https://developer.toradex.com/software/real-time/cortex-m/cortexm-jtag-debugging/
278
279.. _i.MX 8M Plus Applications Processor page:
280   https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-applications-processors/i-mx-8m-plus-arm-cortex-a53-machine-learning-vision-multimedia-and-industrial-iot:IMX8MPLUS
281
282.. _Verdin iMX8M Plus homepage:
283   https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus
284
285.. _Verdin iMX8M Plus developer page:
286   https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-imx8m-plus
287
288.. _Verdin Development Board developer page:
289   https://developer.toradex.com/hardware/verdin-som-family/carrier-boards/verdin-development-board/
290
291.. _Verdin iMX8M Plus Datasheet:
292   https://docs.toradex.com/110977-verdin_imx8m_plus_v1.1_datasheet.pdf
293
294.. _Verdin Development Board Datasheet:
295   https://docs.toradex.com/109463-verdin_development_board_datasheet_v1.1.pdf
296