1/* 2 * Copyright (c) 2020, Linaro Ltd. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Application overlay for testing driver builds 7 * 8 * Names in this file should be chosen in a way that won't conflict 9 * with real-world devicetree nodes, to allow these tests to run on 10 * (and be extended to test) real hardware. 11 */ 12 13/ { 14 test { 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 test_gpio: gpio@deadbeef { 19 compatible = "vnd,gpio"; 20 gpio-controller; 21 reg = <0xdeadbeef 0x1000>; 22 #gpio-cells = <0x2>; 23 status = "okay"; 24 }; 25 26 test_gpio_dw: gpio@c0ffee { 27 compatible = "snps,designware-gpio"; 28 gpio-controller; 29 reg = <0xc0ffee 0x1000>; 30 #gpio-cells = <0x2>; 31 status = "okay"; 32 }; 33 34 test_i2c: i2c@11112222 { 35 #address-cells = <1>; 36 #size-cells = <0>; 37 compatible = "vnd,i2c"; 38 reg = <0x11112222 0x1000>; 39 status = "okay"; 40 clock-frequency = <100000>; 41 42 test_i2c_sx1509b: sx1509b@0 { 43 compatible = "semtech,sx1509b"; 44 reg = <0x00>; 45 #gpio-cells = <2>; 46 ngpios = <16>; 47 gpio-controller; 48 }; 49 50 test_i2c_pcal6408a: pcal6408a@1 { 51 compatible = "nxp,pcal6408a"; 52 reg = <0x01>; 53 gpio-controller; 54 #gpio-cells = <2>; 55 ngpios = <8>; 56 int-gpios = <&test_gpio 0 0>; 57 reset-gpios = <&test_gpio 0 0>; 58 }; 59 60 test_i2c_pcal6416a: pcal6416a@2 { 61 compatible = "nxp,pcal6416a"; 62 reg = <0x02>; 63 gpio-controller; 64 #gpio-cells = <2>; 65 ngpios = <16>; 66 int-gpios = <&test_gpio 0 0>; 67 reset-gpios = <&test_gpio 0 0>; 68 }; 69 70 test_i2c_pcal6524a: pcal6524@22 { 71 compatible = "nxp,pcal6524"; 72 reg = <0x22>; 73 gpio-controller; 74 #gpio-cells = <2>; 75 ngpios = <24>; 76 int-gpios = <&test_gpio 0 0>; 77 reset-gpios = <&test_gpio 0 0>; 78 }; 79 80 test_i2c_pcal6534a: pcal6534@42 { 81 compatible = "nxp,pcal6534"; 82 reg = <0x42>; 83 gpio-controller; 84 #gpio-cells = <2>; 85 ngpios = <32>; 86 int-gpios = <&test_gpio 0 0>; 87 reset-gpios = <&test_gpio 0 0>; 88 }; 89 90 test_i2c_pca9538: pca9538@70 { 91 compatible = "nxp,pca9538"; 92 reg = <0x70>; 93 gpio-controller; 94 #gpio-cells = <2>; 95 ngpios = <8>; 96 int-gpios = <&test_gpio 0 0>; 97 }; 98 99 test_i2c_pca9539: pca9539@74 { 100 compatible = "nxp,pca9539"; 101 reg = <0x74>; 102 gpio-controller; 103 #gpio-cells = <2>; 104 ngpios = <16>; 105 int-gpios = <&test_gpio 0 0>; 106 }; 107 108 test_i2c_pca95xx: pca95xx@3 { 109 compatible = "nxp,pca95xx"; 110 reg = <0x03>; 111 gpio-controller; 112 #gpio-cells = <2>; 113 ngpios = <16>; 114 interrupt-gpios = <&test_gpio 0 0>; 115 }; 116 117 test_i2c_pcf8575: pcf8575@4 { 118 compatible = "nxp,pcf857x"; 119 reg = <0x04>; 120 gpio-controller; 121 #gpio-cells = <2>; 122 ngpios = <16>; 123 int-gpios = <&test_gpio 0 0>; 124 }; 125 126 test_i2c_pcf8574: pcf8574@5 { 127 compatible = "nxp,pcf857x"; 128 reg = <0x05>; 129 gpio-controller; 130 #gpio-cells = <2>; 131 ngpios = <8>; 132 int-gpios = <&test_gpio 0 0>; 133 }; 134 135 test_i2c_pca953x: pca953x@6 { 136 compatible = "ti,tca9538"; 137 reg = <0x06>; 138 gpio-controller; 139 #gpio-cells = <2>; 140 ngpios = <8>; 141 nint-gpios = <&test_gpio 0 0>; 142 }; 143 144 test_i2c_mcp23017: mcp23017@7 { 145 compatible = "microchip,mcp23017"; 146 reg = <0x07>; 147 gpio-controller; 148 #gpio-cells = <2>; 149 ngpios = <16>; 150 }; 151 152 test_i2c_fxl6408: fxl6408@8 { 153 status = "okay"; 154 compatible = "fcs,fxl6408"; 155 reg = <0x08>; 156 ngpios = <8>; 157 #gpio-cells = <2>; 158 gpio-controller; 159 }; 160 161 mfd-nct38xx@9 { 162 compatible = "nuvoton,nct38xx"; 163 reg = <0x09>; 164 test_i2c_nct3807: nct3807 { 165 #address-cells = <1>; 166 #size-cells = <0>; 167 compatible = "nuvoton,nct38xx-gpio"; 168 169 gpio@0 { 170 compatible = "nuvoton,nct38xx-gpio-port"; 171 reg = <0x0>; 172 gpio-controller; 173 #gpio-cells = <2>; 174 ngpios = <8>; 175 pin-mask = <0xff>; 176 pinmux-mask = <0xf7>; 177 }; 178 179 gpio@1 { 180 compatible = "nuvoton,nct38xx-gpio-port"; 181 reg = <0x1>; 182 gpio-controller; 183 #gpio-cells = <2>; 184 ngpios = <8>; 185 pin-mask = <0xff>; 186 }; 187 }; 188 }; 189 190 test_i2c_nct3808_p1: mfd-nct38xx@a { 191 compatible = "nuvoton,nct38xx"; 192 reg = <0x0a>; 193 nct3808_0_P1 { 194 #address-cells = <1>; 195 #size-cells = <0>; 196 compatible = "nuvoton,nct38xx-gpio"; 197 198 gpio@0 { 199 compatible = "nuvoton,nct38xx-gpio-port"; 200 reg = <0x0>; 201 gpio-controller; 202 #gpio-cells = <2>; 203 ngpios = <8>; 204 pin-mask = <0xdc>; 205 pinmux-mask = <0xff>; 206 }; 207 }; 208 }; 209 210 test_i2c_nct3808_p2: mfd-nct38xx@b { 211 compatible = "nuvoton,nct38xx"; 212 reg = <0x0b>; 213 nct3808_0_P2 { 214 #address-cells = <1>; 215 #size-cells = <0>; 216 compatible = "nuvoton,nct38xx-gpio"; 217 218 gpio@0 { 219 compatible = "nuvoton,nct38xx-gpio-port"; 220 reg = <0x0>; 221 gpio-controller; 222 #gpio-cells = <2>; 223 ngpios = <8>; 224 pin-mask = <0xdc>; 225 pinmux-mask = <0xff>; 226 }; 227 }; 228 }; 229 230 test_i2c_tca6424a: tca6424a@c { 231 compatible = "ti,tca6424a"; 232 reg = <0x0c>; 233 gpio-controller; 234 #gpio-cells = <2>; 235 ngpios = <24>; 236 int-gpios = <&test_gpio 0 0>; 237 reset-gpios = <&test_gpio 0 0>; 238 }; 239 240 test_i2c_axp192: axp192@d { 241 compatible = "x-powers,axp192"; 242 reg = <0x0d>; 243 244 axp192_gpio { 245 compatible = "x-powers,axp192-gpio"; 246 gpio-controller; 247 #gpio-cells = <2>; 248 ngpios = <6>; 249 }; 250 }; 251 252 test_i2c_ad559x: ad559x@e { 253 compatible = "adi,ad559x"; 254 status = "okay"; 255 reg = <0x0e>; 256 reset-gpios = <&test_gpio 0 0>; 257 258 test_i2c_ad559x_gpio: gpio-controller { 259 compatible = "adi,ad559x-gpio"; 260 gpio-controller; 261 #gpio-cells = <2>; 262 ngpios = <8>; 263 }; 264 }; 265 266 test_i2c_rt1718s: rt1718s@f { 267 compatible = "richtek,rt1718s"; 268 reg = <0xf>; 269 irq-gpios = <&test_gpio 1 0>; 270 271 rt1718s_gpio_port0: rt1718s_gpio { 272 compatible = "richtek,rt1718s-gpio-port"; 273 274 gpio-controller; 275 #gpio-cells = <2>; 276 ngpios = <3>; 277 }; 278 }; 279 280 test_i2c_stmpe1600: stmpe1600@10 { 281 compatible = "st,stmpe1600"; 282 reg = <0x10>; 283 ngpios = <16>; 284 gpio-controller; 285 #gpio-cells = <2>; 286 }; 287 288 test_i2c_adp5585: adp5585@11 { 289 compatible = "adi,adp5585"; 290 reg = <0x11>; 291 status = "okay"; 292 293 adp_5585_gpio0: adp5585_gpio { 294 compatible = "adi,adp5585-gpio"; 295 gpio-controller; 296 #gpio-cells = <2>; 297 ngpios = <13>; 298 gpio-reserved-ranges = <5 3>; 299 status = "okay"; 300 }; 301 }; 302 303 test_i2c_npm6001: pmic@12 { 304 compatible = "nordic,npm6001"; 305 reg = <0x12>; 306 307 npm6001_ek_gpio: gpio-controller { 308 compatible = "nordic,npm6001-gpio"; 309 gpio-controller; 310 #gpio-cells = <2>; 311 ngpios = <3>; 312 }; 313 }; 314 315 test_i2c_cy8c95xx: cy8c95xx@13 { 316 compatible = "cypress,cy8c95xx-gpio"; 317 reg = <0x13>; 318 ranges; 319 #address-cells = <1>; 320 #size-cells = <0>; 321 322 cy8c95xx_port0: cy8c95xx_port@0 { 323 compatible = "cypress,cy8c95xx-gpio-port"; 324 reg = <0x00>; 325 gpio-controller; 326 #gpio-cells = <2>; 327 ngpios = <8>; 328 status = "okay"; 329 }; 330 331 cy8c95xx_port1: cy8c95xx_port@1 { 332 compatible = "cypress,cy8c95xx-gpio-port"; 333 reg = <0x01>; 334 gpio-controller; 335 #gpio-cells = <2>; 336 ngpios = <8>; 337 status = "okay"; 338 }; 339 }; 340 341 test_i2c_npm2100: pmic@15 { 342 compatible = "nordic,npm2100"; 343 reg = <0x15>; 344 345 npm2100_gpio: gpio-controller { 346 compatible = "nordic,npm2100-gpio"; 347 gpio-controller; 348 #gpio-cells = <2>; 349 ngpios = <2>; 350 }; 351 }; 352 353 test_i2c_aw9523b: aw9523b@16 { 354 status = "okay"; 355 reg = <0x16>; 356 compatible = "awinic,aw9523b"; 357 358 aw9523_gpio: gpio { 359 compatible = "awinic,aw9523b-gpio"; 360 gpio-controller; 361 #gpio-cells = <2>; 362 int-gpios = <&test_gpio 0 0>; 363 reset-gpios = <&test_gpio 0 0>; 364 }; 365 }; 366 367 test_i2c_mcp23008: mcp23008@17 { 368 compatible = "microchip,mcp23008"; 369 reg = <0x17>; 370 gpio-controller; 371 #gpio-cells = <2>; 372 ngpios = <16>; 373 }; 374 375 test_i2c_mcp23009: mcp23009@18 { 376 compatible = "microchip,mcp23009"; 377 reg = <0x18>; 378 gpio-controller; 379 #gpio-cells = <2>; 380 ngpios = <16>; 381 }; 382 383 test_i2c_mcp23016: mcp23016@19 { 384 compatible = "microchip,mcp23016"; 385 reg = <0x19>; 386 gpio-controller; 387 #gpio-cells = <2>; 388 ngpios = <16>; 389 }; 390 391 test_i2c_mcp23018: mcp23016@1a { 392 compatible = "microchip,mcp23018"; 393 reg = <0x1a>; 394 gpio-controller; 395 #gpio-cells = <2>; 396 ngpios = <16>; 397 }; 398 399 test_i2c_pca9554: pca9554@1b { 400 compatible = "nxp,pca9554"; 401 reg = <0x1b>; 402 gpio-controller; 403 #gpio-cells = <2>; 404 ngpios = <8>; 405 int-gpios = <&test_gpio 0 0>; 406 }; 407 408 test_i2c_pca9555: pca9555@1c { 409 compatible = "nxp,pca9555"; 410 reg = <0x1c>; 411 gpio-controller; 412 #gpio-cells = <2>; 413 ngpios = <16>; 414 int-gpios = <&test_gpio 0 0>; 415 }; 416 }; 417 418 nct3807_alert_1 { 419 compatible = "nuvoton,nct38xx-gpio-alert"; 420 irq-gpios = <&test_gpio 0 0>; 421 nct38xx-dev = <&test_i2c_nct3808_p1 &test_i2c_nct3808_p2>; 422 }; 423 424 test_spi: spi@33334444 { 425 #address-cells = <1>; 426 #size-cells = <0>; 427 compatible = "vnd,spi"; 428 reg = <0x33334444 0x1000>; 429 status = "okay"; 430 clock-frequency = <2000000>; 431 432 /* one entry for every devices at spi.dtsi */ 433 cs-gpios = <&test_gpio 0 0 434 &test_gpio 0 0 435 &test_gpio 0 0 436 &test_gpio 0 0 437 &test_gpio 0 0 438 &test_gpio 0 0 439 &test_gpio 0 0 440 &test_gpio 0 0 441 &test_gpio 0 0 442 &test_gpio 0 0 443 &test_gpio 0 0 444 &test_gpio 0 0>; 445 446 test_spi_mcp23s17: mcp23s17@0 { 447 compatible = "microchip,mcp23s17"; 448 spi-max-frequency = <0>; 449 reg = <0x0>; 450 gpio-controller; 451 #gpio-cells = <2>; 452 ngpios = <16>; 453 }; 454 455 test_spi_mcp23sxx: mcp23s18@1 { 456 compatible = "microchip,mcp23s18"; 457 spi-max-frequency = <0>; 458 reg = <0x01>; 459 gpio-controller; 460 #gpio-cells = <2>; 461 ngpios = <16>; 462 }; 463 464 test_spi_bd8lb600fs: bd8lb600fs@2 { 465 compatible = "rohm,bd8lb600fs"; 466 status = "okay"; 467 spi-max-frequency = <0>; 468 reg = <0x02>; 469 reset-gpios = <&test_gpio 0 0>; 470 instance-count = <1>; 471 472 bd8lb600fs_gpio: bd8lb600fs_gpio { 473 compatible = "rohm,bd8lb600fs-gpio"; 474 status = "okay"; 475 gpio-controller; 476 #gpio-cells = <2>; 477 ngpios = <8>; 478 }; 479 }; 480 481 test_spi_ad559x: ad559x@3 { 482 compatible = "adi,ad559x"; 483 status = "okay"; 484 reg = <0x03>; 485 spi-max-frequency = <0>; 486 reset-gpios = <&test_gpio 0 0>; 487 488 test_spi_ad559x_gpio: gpio-controller { 489 compatible = "adi,ad559x-gpio"; 490 gpio-controller; 491 #gpio-cells = <2>; 492 ngpios = <8>; 493 }; 494 }; 495 496 test_spi_tle9104: tle9104@4 { 497 compatible = "infineon,tle9104"; 498 status = "okay"; 499 spi-max-frequency = <0>; 500 reg = <0x04>; 501 resn-gpios = <&test_gpio 0 0>; 502 en-gpios = <&test_gpio 0 0>; 503 504 tle9104_gpio: tle9104_gpio { 505 compatible = "infineon,tle9104-gpio"; 506 status = "okay"; 507 gpio-controller; 508 #gpio-cells = <2>; 509 ngpios = <4>; 510 }; 511 }; 512 513 test_spi_sn74hc595: sn74hc595@5 { 514 compatible = "ti,sn74hc595"; 515 status = "okay"; 516 spi-max-frequency = <0>; 517 reg = <0x05>; 518 519 gpio-controller; 520 reset-gpios = <&test_gpio 0 0>; 521 ngpios = <8>; 522 #gpio-cells = <2>; 523 }; 524 525 test_spi_max14906: max14906@6 { 526 compatible = "adi,max14906-gpio"; 527 status = "okay"; 528 reg = <0x06>; 529 spi-max-frequency = <0>; 530 gpio-controller; 531 #gpio-cells = <2>; 532 ngpios = <4>; 533 crc-en; 534 spi-addr = <0>; 535 ow-en = <0 0 0 0>; 536 vdd-ov-en = <0 0 0 0>; 537 gdrv-en = <0 0 0 0>; 538 sh-vdd-en = <0 0 0 0>; 539 drdy-gpios = <&test_gpio 0 0>; 540 fault-gpios = <&test_gpio 0 0>; 541 sync-gpios = <&test_gpio 0 0>; 542 en-gpios = <&test_gpio 0 0>; 543 }; 544 545 test_spi_max14916: max14916@7 { 546 compatible = "adi,max14916-gpio"; 547 status = "okay"; 548 reg = <0x07>; 549 spi-max-frequency = <0>; 550 gpio-controller; 551 #gpio-cells = <2>; 552 ngpios = <8>; 553 crc-en; 554 spi-addr = <0>; 555 ow-on-en = <0 0 0 0>; 556 ow-off-en = <0 0 0 0>; 557 sh-vdd-en = <0 0 0 0>; 558 drdy-gpios = <&test_gpio 0 0>; 559 fault-gpios = <&test_gpio 0 0>; 560 sync-gpios = <&test_gpio 0 0>; 561 en-gpios = <&test_gpio 0 0>; 562 }; 563 564 test_spi_mcp23s08: mcp23s08@8 { 565 compatible = "microchip,mcp23s08"; 566 spi-max-frequency = <0>; 567 reg = <0x08>; 568 gpio-controller; 569 #gpio-cells = <2>; 570 ngpios = <16>; 571 }; 572 573 test_spi_mcp23s09: mcp23s09@9 { 574 compatible = "microchip,mcp23s09"; 575 spi-max-frequency = <0>; 576 reg = <0x09>; 577 gpio-controller; 578 #gpio-cells = <2>; 579 ngpios = <16>; 580 }; 581 582 test_spi_max22190: max22190@a { 583 compatible = "adi,max22190-gpio"; 584 status = "okay"; 585 reg = <0x0a>; 586 spi-max-frequency = <0>; 587 gpio-controller; 588 #gpio-cells = <2>; 589 ngpios = <8>; 590 max22190-mode = <1>; 591 filter-wbes = <1 0 1 0 1 0 1 0>; 592 filter-fbps = <0 0 0 0 0 0 0 0>; 593 filter-delays = <50 100 400 800 1600 3200 12800 20000>; 594 drdy-gpios = <&test_gpio 0 0>; 595 fault-gpios = <&test_gpio 0 0>; 596 latch-gpios = <&test_gpio 0 0>; 597 }; 598 599 test_spi_max22017: max22017_mfd@b { 600 compatible = "adi,max22017"; 601 status = "okay"; 602 reg = <0x0b>; 603 spi-max-frequency = <0>; 604 605 max22017_gpio0: max22017_gpio { 606 compatible = "adi,max22017-gpio"; 607 status = "okay"; 608 gpio-controller; 609 ngpios = <5>; 610 #gpio-cells = <2>; 611 }; 612 }; 613 614 test_max14915: max14915@c { 615 compatible = "adi,max14915-gpio"; 616 status = "okay"; 617 reg = <0x0c>; 618 spi-max-frequency = <0>; 619 gpio-controller; 620 #gpio-cells = <2>; 621 ngpios = <8>; 622 crc-en; 623 spi-addr = <0>; 624 drdy-gpios = <&test_gpio 0 0>; 625 fault-gpios = <&test_gpio 0 0>; 626 sync-gpios = <&test_gpio 0 0>; 627 en-gpios = <&test_gpio 0 0>; 628 }; 629 }; 630 }; 631}; 632