1# Copyright 2024 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_MIMX8UD7_ADSP
5	select XTENSA
6	select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
7	select XTENSA_RESET_VECTOR
8	select XTENSA_USE_CORE_CRT1
9	select ATOMIC_OPERATIONS_BUILTIN
10	select GEN_ISR_TABLES
11	select XTENSA_SMALL_VECTOR_TABLE_ENTRY
12	select CPU_HAS_DCACHE
13	select HAS_MCUX
14	select HAS_MCUX_IOMUXC
15
16# note: the NXP HAL refers to the HIFI4 DSP as
17# `dsp1` and the Fusion DSP as `dsp0`, thus the
18# suffix(es) below
19config MCUX_CORE_SUFFIX
20	default "_dsp1" if SOC_MIMX8UD7_ADSP
21