/Zephyr-latest/arch/riscv/core/ |
D | smp.c | 31 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, in arch_cpu_start() argument 34 riscv_cpu_init[cpu_num].fn = fn; in arch_cpu_start() 35 riscv_cpu_init[cpu_num].arg = arg; in arch_cpu_start() 41 if (pm_cpu_on(cpu_num, (uintptr_t)&__start)) { in arch_cpu_start() 42 printk("Failed to boot secondary CPU %d\n", cpu_num); in arch_cpu_start() 48 riscv_cpu_wake_flag = _kernel.cpus[cpu_num].arch.hartid; in arch_cpu_start() 55 unsigned int cpu_num = 0; in arch_secondary_cpu_init() local 59 cpu_num = i; in arch_secondary_cpu_init() 62 csr_write(mscratch, &_kernel.cpus[cpu_num]); in arch_secondary_cpu_init() 64 _kernel.cpus[cpu_num].arch.online = true; in arch_secondary_cpu_init() [all …]
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/Zephyr-latest/arch/arc/core/ |
D | smp.c | 44 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, in arch_cpu_start() argument 47 _curr_cpu[cpu_num] = &(_kernel.cpus[cpu_num]); in arch_cpu_start() 48 arc_cpu_init[cpu_num].fn = fn; in arch_cpu_start() 49 arc_cpu_init[cpu_num].arg = arg; in arch_cpu_start() 57 arc_cpu_wake_flag = cpu_num; in arch_cpu_start() 66 static void arc_connect_debug_mask_update(int cpu_num) in arc_connect_debug_mask_update() argument 68 uint32_t core_mask = 1 << cpu_num; in arc_connect_debug_mask_update() 74 if (cpu_num != ARC_MP_PRIMARY_CPU_ID) { in arc_connect_debug_mask_update() 94 void arch_secondary_cpu_init(int cpu_num) in arch_secondary_cpu_init() argument 105 arc_connect_debug_mask_update(cpu_num); in arch_secondary_cpu_init() [all …]
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/Zephyr-latest/arch/x86/core/intel64/ |
D | cpu.c | 50 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, in arch_cpu_start() argument 58 ACPI_MADT_LOCAL_APIC *lapic = acpi_local_apic_get(cpu_num); in arch_cpu_start() 62 x86_cpu_loapics[cpu_num] = lapic->Id; in arch_cpu_start() 72 apic_id = x86_cpu_loapics[cpu_num]; in arch_cpu_start() 74 x86_cpuboot[cpu_num].sp = (uint64_t) K_KERNEL_STACK_BUFFER(stack) + sz; in arch_cpu_start() 75 x86_cpuboot[cpu_num].stack_size = sz; in arch_cpu_start() 76 x86_cpuboot[cpu_num].fn = fn; in arch_cpu_start() 77 x86_cpuboot[cpu_num].arg = arg; in arch_cpu_start() 78 x86_cpuboot[cpu_num].cpu_id = cpu_num; in arch_cpu_start() 84 while (x86_cpuboot[cpu_num].ready == 0) { in arch_cpu_start() [all …]
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/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace20_lnl/ |
D | adsp_power.h | 59 static ALWAYS_INLINE void soc_cpu_power_up(int cpu_num) in soc_cpu_power_up() argument 61 ACE_PWRCTL->wpdsphpxpg |= BIT(cpu_num); in soc_cpu_power_up() 73 static ALWAYS_INLINE void soc_cpu_power_down(int cpu_num) in soc_cpu_power_down() argument 75 ACE_PWRCTL->wpdsphpxpg &= ~BIT(cpu_num); in soc_cpu_power_down() 87 static ALWAYS_INLINE bool soc_cpu_is_powered(int cpu_num) in soc_cpu_is_powered() argument 89 return (ACE_PWRSTS->dsphpxpgs & BIT(cpu_num)) == BIT(cpu_num); in soc_cpu_is_powered()
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/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace15_mtpm/ |
D | adsp_power.h | 58 static ALWAYS_INLINE void soc_cpu_power_up(int cpu_num) in soc_cpu_power_up() argument 60 ACE_PWRCTL->wpdsphpxpg |= BIT(cpu_num); in soc_cpu_power_up() 72 static ALWAYS_INLINE void soc_cpu_power_down(int cpu_num) in soc_cpu_power_down() argument 74 ACE_PWRCTL->wpdsphpxpg &= ~BIT(cpu_num); in soc_cpu_power_down() 86 static ALWAYS_INLINE bool soc_cpu_is_powered(int cpu_num) in soc_cpu_is_powered() argument 88 return (ACE_PWRSTS->dsphpxpgs & BIT(cpu_num)) == BIT(cpu_num); in soc_cpu_is_powered()
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/Zephyr-latest/arch/arm/core/cortex_a_r/ |
D | smp.c | 58 int cpu_num; member 97 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_t fn, void *arg) in arch_cpu_start() argument 115 if (j == cpu_num - 1) { in arch_cpu_start() 122 printk("Can't find CPU Core %d from dts and failed to boot it\n", cpu_num); in arch_cpu_start() 128 arm_cpu_boot_params.fiq_sp = K_KERNEL_STACK_BUFFER(z_arm_fiq_stack[cpu_num]) in arch_cpu_start() 130 arm_cpu_boot_params.abt_sp = K_KERNEL_STACK_BUFFER(z_arm_abort_stack[cpu_num]) in arch_cpu_start() 132 arm_cpu_boot_params.udf_sp = K_KERNEL_STACK_BUFFER(z_arm_undef_stack[cpu_num]) in arch_cpu_start() 134 arm_cpu_boot_params.svc_sp = K_KERNEL_STACK_BUFFER(z_arm_svc_stack[cpu_num]) in arch_cpu_start() 136 arm_cpu_boot_params.sys_sp = K_KERNEL_STACK_BUFFER(z_arm_sys_stack[cpu_num]) in arch_cpu_start() 141 arm_cpu_boot_params.cpu_num = cpu_num; in arch_cpu_start() [all …]
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/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace30/ |
D | adsp_power.h | 68 static ALWAYS_INLINE void soc_cpu_power_up(int cpu_num) in soc_cpu_power_up() argument 70 ACE_PWRCTL2->wpdsphpxpg |= BIT(cpu_num); in soc_cpu_power_up() 82 static ALWAYS_INLINE void soc_cpu_power_down(int cpu_num) in soc_cpu_power_down() argument 84 ACE_PWRCTL2->wpdsphpxpg &= ~BIT(cpu_num); in soc_cpu_power_down() 96 static ALWAYS_INLINE bool soc_cpu_is_powered(int cpu_num) in soc_cpu_is_powered() argument 98 return (ACE_PWRSTS2->dsphpxpgs & BIT(cpu_num)) == BIT(cpu_num); in soc_cpu_is_powered()
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/Zephyr-latest/arch/arm64/core/ |
D | smp.c | 43 int cpu_num; member 67 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, in arch_cpu_start() argument 92 arm64_cpu_boot_params.cpu_num = cpu_num; in arch_cpu_start() 111 cpu_num, cpu_mpid); in arch_cpu_start() 123 printk("Can't find CPU Core %d from dts and failed to boot it\n", cpu_num); in arch_cpu_start() 132 cpu_map[cpu_num] = cpu_mpid; in arch_cpu_start() 134 printk("Secondary CPU core %d (MPID:%#llx) is up\n", cpu_num, cpu_mpid); in arch_cpu_start() 138 void arch_secondary_cpu_init(int cpu_num) in arch_secondary_cpu_init() argument 140 cpu_num = arm64_cpu_boot_params.cpu_num; in arch_secondary_cpu_init() 147 write_tpidrro_el0((uintptr_t)&_kernel.cpus[cpu_num]); in arch_secondary_cpu_init()
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/Zephyr-latest/soc/intel/intel_adsp/common/ |
D | multiprocessing.c | 118 bool arch_cpu_active(int cpu_num) in arch_cpu_active() argument 120 return soc_cpus_active[cpu_num]; in arch_cpu_active() 123 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, in arch_cpu_start() argument 126 __ASSERT_NO_MSG(!soc_cpus_active[cpu_num]); in arch_cpu_start() 128 start_rec.cpu = cpu_num; in arch_cpu_start() 134 soc_start_core(cpu_num); in arch_cpu_start()
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/Zephyr-latest/soc/intel/intel_adsp/ace/ |
D | multiprocessing.c | 128 void soc_start_core(int cpu_num) in soc_start_core() argument 133 if (cpu_num > 0) { in soc_start_core() 144 if (pm_state_next_get(cpu_num)->state == PM_STATE_ACTIVE) { in soc_start_core() 154 soc_cpu_power_up(cpu_num); in soc_start_core() 156 if (!WAIT_FOR(soc_cpu_is_powered(cpu_num), in soc_start_core() 162 DSPCS.bootctl[cpu_num].battr |= DSPBR_BATTR_LPSCTL_BATTR_SLAVE_CORE; in soc_start_core() 170 DSPCS.capctl[cpu_num].ctl &= ~DSPCS_CTL_SPA; in soc_start_core() 173 if (!WAIT_FOR((DSPCS.capctl[cpu_num].ctl & DSPCS_CTL_CPA) != DSPCS_CTL_CPA, in soc_start_core() 178 DSPCS.capctl[cpu_num].ctl |= DSPCS_CTL_SPA; in soc_start_core() 182 while (((DSPCS.capctl[cpu_num].ctl & DSPCS_CTL_CPA) != DSPCS_CTL_CPA) && in soc_start_core()
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/Zephyr-latest/soc/intel/intel_adsp/cavs/ |
D | multiprocessing.c | 43 void soc_start_core(int cpu_num) in soc_start_core() argument 85 if (pm_state_next_get(cpu_num)->state == PM_STATE_ACTIVE) { in soc_start_core() 102 CAVS_SHIM.clkctl |= CAVS_CLKCTL_TCPLCG(cpu_num); in soc_start_core() 103 CAVS_SHIM.pwrctl |= CAVS_PWRCTL_TCPDSPPG(cpu_num); in soc_start_core() 108 CAVS_INTCTRL[cpu_num].l2.clear = CAVS_L2_IDC; in soc_start_core() 122 IDC[curr_cpu].core[cpu_num].ietc = ietc; in soc_start_core() 123 IDC[curr_cpu].core[cpu_num].itc = IDC_MSG_POWER_UP; in soc_start_core()
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/Zephyr-latest/arch/riscv/include/ |
D | kernel_arch_func.h | 45 unsigned int cpu_num, hart_x; in arch_kernel_init() local 47 for (cpu_num = 1, hart_x = 0; cpu_num < arch_num_cpus(); cpu_num++) { in arch_kernel_init() 51 _kernel.cpus[cpu_num].arch.hartid = cpu_node_list[hart_x]; in arch_kernel_init()
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/Zephyr-latest/drivers/interrupt_controller/ |
D | intc_plic.c | 159 static inline mem_addr_t get_context_en_addr(const struct device *dev, uint32_t cpu_num) in get_context_en_addr() argument 167 hartid = _kernel.cpus[cpu_num].arch.hartid; in get_context_en_addr() 185 static inline mem_addr_t get_threshold_priority_addr(const struct device *dev, uint32_t cpu_num) in get_threshold_priority_addr() argument 191 hartid = _kernel.cpus[cpu_num].arch.hartid; in get_threshold_priority_addr() 259 for (uint32_t cpu_num = 0; cpu_num < arch_num_cpus(); cpu_num++) { in plic_irq_enable_set_state() local 261 get_context_en_addr(dev, cpu_num) + local_irq_to_reg_offset(local_irq); in plic_irq_enable_set_state() 266 enable ? (get_irq_cpumask(dev, local_irq) & BIT(cpu_num)) != 0 : false); in plic_irq_enable_set_state() 319 for (uint32_t cpu_num = 0; cpu_num < arch_num_cpus(); cpu_num++) { in local_irq_is_enabled() local 321 get_context_en_addr(dev, cpu_num) + local_irq_to_reg_offset(local_irq); in local_irq_is_enabled() 591 for (uint32_t cpu_num = 0; cpu_num < arch_num_cpus(); cpu_num++) { in plic_init() local [all …]
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/Zephyr-latest/soc/espressif/esp32/ |
D | esp32-mp.c | 232 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, in arch_cpu_start() argument 239 __ASSERT(cpu_num == 1, "ESP-32 supports only two CPUs"); in arch_cpu_start() 245 sr.cpu = cpu_num; in arch_cpu_start() 262 cpus_active[cpu_num] = true; in arch_cpu_start() 301 IRAM_ATTR bool arch_cpu_active(int cpu_num) in arch_cpu_active() argument 303 return cpus_active[cpu_num]; in arch_cpu_active()
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/Zephyr-latest/soc/intel/intel_adsp/common/include/ |
D | soc.h | 25 extern void soc_start_core(int cpu_num);
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/Zephyr-latest/include/zephyr/arch/ |
D | arch_interface.h | 244 void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, 252 bool arch_cpu_active(int cpu_num);
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/Zephyr-latest/include/zephyr/acpi/ |
D | acpi.h | 290 ACPI_MADT_LOCAL_APIC *acpi_local_apic_get(int cpu_num);
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/Zephyr-latest/lib/acpi/ |
D | acpi.c | 909 ACPI_MADT_LOCAL_APIC *acpi_local_apic_get(int cpu_num) in acpi_local_apic_get() argument 921 for (idx = 0; cpu_num >= 0 && idx < cpu_cnt; idx++) { in acpi_local_apic_get() 923 if (cpu_num == 0) { in acpi_local_apic_get() 927 cpu_num--; in acpi_local_apic_get()
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