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Searched refs:ARM_CACHE_INTR_SS_OFF (Results 1 – 1 of 1) sorted by relevance

/trusted-firmware-m-3.4.0/platform/ext/target/arm/musca_s1/Native_Driver/
Dcache_drv.h77 #define ARM_CACHE_INTR_SS_OFF 0x5U /*!< Statistics Saturated IRQ offset */ macro
93 arm_cache_ss_intr_mask = (0x1U<<ARM_CACHE_INTR_SS_OFF),