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Searched refs:win (Results 1 – 25 of 28) sorted by relevance

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/trusted-firmware-a-latest/drivers/marvell/
Dgwin.c40 #define GWIN_CR_OFFSET(ap, win) (MVEBU_GWIN_BASE(ap) + 0x0 + \ argument
41 (0x10 * (win)))
42 #define GWIN_ALR_OFFSET(ap, win) (MVEBU_GWIN_BASE(ap) + 0x8 + \ argument
43 (0x10 * (win)))
44 #define GWIN_AHR_OFFSET(ap, win) (MVEBU_GWIN_BASE(ap) + 0xc + \ argument
45 (0x10 * (win)))
50 static void gwin_check(struct addr_map_win *win) in gwin_check() argument
53 if (IS_NOT_ALIGN(win->base_addr, GWIN_ALIGNMENT_64M)) { in gwin_check()
54 win->base_addr &= ~(GWIN_ALIGNMENT_64M - 1); in gwin_check()
56 __func__, win->base_addr); in gwin_check()
[all …]
Damb_adec.c29 #define AMB_WIN_CR_OFFSET(win) (amb_base + 0x0 + (0x8 * win)) argument
35 #define AMB_WIN_BASE_OFFSET(win) (amb_base + 0x4 + (0x8 * win)) argument
44 static void amb_check_win(struct addr_map_win *win, uint32_t win_num) in amb_check_win() argument
49 if (win->base_addr > AMB_BASE_ADDR_MASK) { in amb_check_win()
51 win_num, win->base_addr); in amb_check_win()
52 win->base_addr = AMB_BASE_ADDR_MASK; in amb_check_win()
53 WARN("Set the base address to 0x%" PRIx64 "\n", win->base_addr); in amb_check_win()
56 base_addr = win->base_addr << AMB_BASE_OFFSET; in amb_check_win()
60 win->base_addr = ALIGN_UP(base_addr, AMB_WIN_ALIGNMENT_1M); in amb_check_win()
63 WARN("Align up the base address to 0x%" PRIx64 "\n", win->base_addr); in amb_check_win()
[all …]
Diob.c37 #define IOB_WIN_CR_OFFSET(win) (iob_base + 0x0 + (0x20 * win)) argument
41 #define IOB_WIN_SCR_OFFSET(win) (iob_base + 0x4 + (0x20 * win)) argument
47 #define IOB_WIN_ALR_OFFSET(win) (iob_base + 0x8 + (0x20 * win)) argument
48 #define IOB_WIN_AHR_OFFSET(win) (iob_base + 0xC + (0x20 * win)) argument
50 #define IOB_WIN_DIOB_CR_OFFSET(win) (iob_base + 0x10 + (0x20 * win)) argument
56 static void iob_win_check(struct addr_map_win *win, uint32_t win_num) in iob_win_check() argument
59 if (IS_NOT_ALIGN(win->base_addr, IOB_WIN_ALIGNMENT)) { in iob_win_check()
60 win->base_addr = ALIGN_UP(win->base_addr, IOB_WIN_ALIGNMENT); in iob_win_check()
64 win->base_addr); in iob_win_check()
68 if (IS_NOT_ALIGN(win->win_size, IOB_WIN_ALIGNMENT)) { in iob_win_check()
[all …]
Dio_win.c34 #define IO_WIN_ALR_OFFSET(ap, win) (MVEBU_IO_WIN_BASE(ap) + 0x0 + \ argument
35 (0x10 * win))
36 #define IO_WIN_AHR_OFFSET(ap, win) (MVEBU_IO_WIN_BASE(ap) + 0x8 + \ argument
37 (0x10 * win))
38 #define IO_WIN_CR_OFFSET(ap, win) (MVEBU_IO_WIN_BASE(ap) + 0xC + \ argument
39 (0x10 * win))
44 static void io_win_check(struct addr_map_win *win) in io_win_check() argument
48 if (IS_NOT_ALIGN(win->base_addr, IO_WIN_ALIGNMENT_1M)) { in io_win_check()
49 win->base_addr = ALIGN_UP(win->base_addr, IO_WIN_ALIGNMENT_1M); in io_win_check()
51 __func__, win->base_addr); in io_win_check()
[all …]
Dccu.c63 #define CCU_RGF(win) (MVEBU_CCU_BASE(MVEBU_AP0) + \ argument
64 0x90 + 4 * (win))
100 void ccu_win_check(struct addr_map_win *win) in ccu_win_check() argument
103 if (IS_NOT_ALIGN(win->base_addr, CCU_WIN_ALIGNMENT)) { in ccu_win_check()
104 win->base_addr = ALIGN_UP(win->base_addr, CCU_WIN_ALIGNMENT); in ccu_win_check()
106 __func__, win->base_addr); in ccu_win_check()
110 if (IS_NOT_ALIGN(win->win_size, CCU_WIN_ALIGNMENT)) { in ccu_win_check()
111 win->win_size = ALIGN_UP(win->win_size, CCU_WIN_ALIGNMENT); in ccu_win_check()
113 __func__, win->win_size); in ccu_win_check()
123 void ccu_enable_win(int ap_index, struct addr_map_win *win, uint32_t win_id) in ccu_enable_win() argument
[all …]
/trusted-firmware-a-latest/include/drivers/marvell/
Dccu.h18 #define CCU_WIN_CR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x0 + \ argument
19 (0x10 * win))
23 #define CCU_WIN_SCR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x4 + \ argument
24 (0x10 * win))
28 #define CCU_WIN_ALR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x8 + \ argument
29 (0x10 * win))
30 #define CCU_WIN_AHR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0xC + \ argument
31 (0x10 * win))
41 void ccu_win_check(struct addr_map_win *win);
42 void ccu_enable_win(int ap_index, struct addr_map_win *win, uint32_t win_id);
[all …]
Dgwin.h16 void gwin_temp_win_insert(int ap_index, struct addr_map_win *win, int size);
17 void gwin_temp_win_remove(int ap_index, struct addr_map_win *win, int size);
Dio_win.h16 void iow_temp_win_insert(int ap_index, struct addr_map_win *win, int size);
17 void iow_temp_win_remove(int ap_index, struct addr_map_win *win, int size);
/trusted-firmware-a-latest/plat/marvell/octeontx/otx2/t91/t9130/board/
Dmarvell_plat_config.c26 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
31 *win = amb_memory_map_cp0; in marvell_get_amb_memory_map()
38 *win = 0; in marvell_get_amb_memory_map()
79 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
82 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
83 if (*win == NULL) in marvell_get_io_win_memory_map()
127 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
132 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
136 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
140 *win = iob_memory_map_cp2; in marvell_get_iob_memory_map()
[all …]
/trusted-firmware-a-latest/plat/marvell/octeontx/otx2/t91/t9130_cex7_eval/board/
Dmarvell_plat_config.c32 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
37 *win = amb_memory_map_cp0; in marvell_get_amb_memory_map()
41 *win = amb_memory_map_cp1; in marvell_get_amb_memory_map()
47 *win = 0; in marvell_get_amb_memory_map()
102 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
105 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
106 if (*win == NULL) in marvell_get_io_win_memory_map()
158 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
163 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
167 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
[all …]
/trusted-firmware-a-latest/plat/marvell/armada/a8k/a70x0_mochabin/board/
Dmarvell_plat_config.c28 int marvell_get_amb_memory_map(struct addr_map_win **win, in marvell_get_amb_memory_map() argument
31 *win = amb_memory_map; in marvell_get_amb_memory_map()
32 if (*win == NULL) in marvell_get_amb_memory_map()
59 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
62 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
63 if (*win == NULL) in marvell_get_io_win_memory_map()
89 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
92 *win = iob_memory_map; in marvell_get_iob_memory_map()
124 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
127 *win = ccu_memory_map; in marvell_get_ccu_memory_map()
/trusted-firmware-a-latest/plat/marvell/armada/a8k/a80x0_mcbin/board/
Dmarvell_plat_config.c60 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
63 *win = amb_memory_map; in marvell_get_amb_memory_map()
64 if (*win == NULL) in marvell_get_amb_memory_map()
95 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
98 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
99 if (*win == NULL) in marvell_get_io_win_memory_map()
136 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
141 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
145 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
150 *win = 0; in marvell_get_iob_memory_map()
[all …]
/trusted-firmware-a-latest/plat/marvell/armada/a8k/a80x0_puzzle/board/
Dmarvell_plat_config.c60 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
63 *win = amb_memory_map; in marvell_get_amb_memory_map()
64 if (*win == NULL) in marvell_get_amb_memory_map()
99 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
102 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
103 if (*win == NULL) in marvell_get_io_win_memory_map()
140 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
145 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
149 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
154 *win = 0; in marvell_get_iob_memory_map()
[all …]
/trusted-firmware-a-latest/plat/marvell/armada/a8k/a70x0/board/
Dmarvell_plat_config.c26 int marvell_get_amb_memory_map(struct addr_map_win **win, in marvell_get_amb_memory_map() argument
29 *win = amb_memory_map; in marvell_get_amb_memory_map()
30 if (*win == NULL) in marvell_get_amb_memory_map()
57 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
60 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
61 if (*win == NULL) in marvell_get_io_win_memory_map()
87 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
90 *win = iob_memory_map; in marvell_get_iob_memory_map()
122 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
125 *win = ccu_memory_map; in marvell_get_ccu_memory_map()
/trusted-firmware-a-latest/plat/marvell/armada/a8k/a70x0_amc/board/
Dmarvell_plat_config.c23 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
26 *win = amb_memory_map; in marvell_get_amb_memory_map()
27 if (*win == NULL) in marvell_get_amb_memory_map()
54 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
57 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
58 if (*win == NULL) in marvell_get_io_win_memory_map()
78 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
81 *win = iob_memory_map; in marvell_get_iob_memory_map()
113 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
116 *win = ccu_memory_map; in marvell_get_ccu_memory_map()
/trusted-firmware-a-latest/plat/marvell/armada/a8k/a80x0/board/
Dmarvell_plat_config.c26 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
29 *win = amb_memory_map; in marvell_get_amb_memory_map()
30 if (*win == NULL) in marvell_get_amb_memory_map()
65 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
68 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
69 if (*win == NULL) in marvell_get_io_win_memory_map()
106 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
111 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
115 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
120 *win = 0; in marvell_get_iob_memory_map()
[all …]
/trusted-firmware-a-latest/drivers/marvell/mc_trustzone/
Dmc_trustzone.c32 void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id) in tz_enable_win() argument
35 uint32_t val, base = win->base_addr; in tz_enable_win()
43 tz_size = fls(TZ_SIZE(win->win_size)); in tz_enable_win()
46 __func__, win->win_size, tz_size); in tz_enable_win()
56 win->base_addr, base); in tz_enable_win()
59 val = base | (tz_size << 7) | win->target_id | TZ_VALID; in tz_enable_win()
62 __func__, base, (tz_size << 7), win->target_id, val); in tz_enable_win()
71 (win->base_addr >> 32)); in tz_enable_win()
Dmc_trustzone.h25 void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id);
/trusted-firmware-a-latest/plat/marvell/armada/a3k/common/
Dio_addr_dec.c14 #define MVEBU_DEC_WIN_CTRL_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument
15 (win) * (off))
16 #define MVEBU_DEC_WIN_BASE_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument
17 (win) * (off) + 0x4)
18 #define MVEBU_DEC_WIN_REMAP_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument
19 (win) * (off) + 0x8)
84 struct dram_win *win; in set_io_addr_dec() local
107 for (id = 0; id < win_map->dram_win_num; id++, win++) { in set_io_addr_dec()
108 win = &win_map->dram_windows[id]; in set_io_addr_dec()
109 set_io_addr_dec_win(id, win->base_addr, win->win_size, dec_win); in set_io_addr_dec()
Ddram_win.c190 struct dram_win *win; in dram_win_map_build() local
203 win = win_map->dram_windows + win_map->dram_win_num; in dram_win_map_build()
207 win->base_addr = (base_reg & CPU_DEC_BR_BASE_MASK) >> in dram_win_map_build()
209 win->base_addr *= CPU_DEC_CR_WIN_SIZE_ALIGNMENT; in dram_win_map_build()
216 win->win_size = (size_reg & CPU_DEC_CR_WIN_SIZE_MASK) >> in dram_win_map_build()
218 win->win_size = (win->win_size + 1) * in dram_win_map_build()
Dmarvell_plat_config.c27 int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size) in marvell_get_io_dec_win_conf() argument
29 *win = io_dec_win_conf; in marvell_get_io_dec_win_conf()
/trusted-firmware-a-latest/include/plat/marvell/armada/a8k/common/
Darmada_common.h119 int marvell_get_amb_memory_map(struct addr_map_win **win,
121 int marvell_get_io_win_memory_map(int ap_idx, struct addr_map_win **win,
123 int marvell_get_iob_memory_map(struct addr_map_win **win,
125 int marvell_get_ccu_memory_map(int ap_idx, struct addr_map_win **win,
/trusted-firmware-a-latest/plat/marvell/armada/a8k/common/include/
Da8k_plat_def.h70 #define MVEBU_AP_MC_TRUSTZONE_REG_LOW(ap, win) (MVEBU_REGS_BASE_AP(ap) + \ argument
71 0x20080 + ((win) * 0x8))
72 #define MVEBU_AP_MC_TRUSTZONE_REG_HIGH(ap, win) (MVEBU_REGS_BASE_AP(ap) + \ argument
73 0x20084 + ((win) * 0x8))
/trusted-firmware-a-latest/include/plat/marvell/armada/a3k/common/
Darmada_common.h15 int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size);
/trusted-firmware-a-latest/docs/plat/marvell/
Dindex.rst14 armada/misc/mvebu-io-win

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