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Searched refs:nv_ctr (Results 1 – 25 of 34) sorted by relevance

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/trusted-firmware-a-latest/plat/nxp/common/tbbr/
Dx509_tbbr.c32 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
39 assert(nv_ctr != NULL); in plat_get_nv_ctr()
54 *nv_ctr = 0U; in plat_get_nv_ctr()
56 *nv_ctr = (32U - __builtin_clz(val)); in plat_get_nv_ctr()
59 INFO("NV Counter value for UID %d is %d\n", uid_num, *nv_ctr); in plat_get_nv_ctr()
64 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
72 if (nv_ctr > 32U) { in plat_set_nv_ctr()
84 sfp_val = (1U << (nv_ctr - 1)); in plat_set_nv_ctr()
Dcsf_tbbr.c67 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
73 *nv_ctr = 0U; in plat_get_nv_ctr()
78 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/arm/board/fvp/
Dfvp_trusted_boot.c73 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
85 mmio_write_32(nv_ctr_addr, nv_ctr); in plat_set_nv_ctr()
91 return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1; in plat_set_nv_ctr()
100 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
106 assert(nv_ctr != NULL); in plat_get_nv_ctr()
113 *nv_ctr = *((unsigned int *)nv_ctr_addr); in plat_get_nv_ctr()
/trusted-firmware-a-latest/plat/arm/board/morello/
Dmorello_trusted_boot.c17 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
19 *nv_ctr = MORELLO_FW_NVCTR_VAL; in plat_get_nv_ctr()
32 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/arm/board/n1sdp/
Dn1sdp_trusted_boot.c17 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
19 *nv_ctr = N1SDP_FW_NVCTR_VAL; in plat_get_nv_ctr()
31 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/arm/board/corstone1000/common/
Dcorstone1000_trusted_boot.c39 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
41 *nv_ctr = CORSTONE1000_FW_NVCTR_VAL; in plat_get_nv_ctr()
50 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/qemu/common/
Dqemu_trusted_boot.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/socionext/uniphier/
Duniphier_tbbr.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
27 *nv_ctr = 0; in plat_get_nv_ctr()
32 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/hisilicon/hikey960/
Dhikey960_tbbr.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mp/
Dimx8mp_trusted_boot.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mm/
Dimx8mm_trusted_boot.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/hisilicon/hikey/
Dhikey_tbbr.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/imx/imx7/common/
Dimx7_trusted_boot.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/rpi/common/
Drpi3_trusted_boot.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/socionext/synquacer/
Dsq_tbbr.c21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
27 *nv_ctr = 0; in plat_get_nv_ctr()
32 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/arm/board/fvp_r/
Dfvp_r_trusted_boot.c48 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
66 mmio_write_32(nv_ctr_addr, nv_ctr); in plat_set_nv_ctr()
72 return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1; in plat_set_nv_ctr()
/trusted-firmware-a-latest/plat/common/tbbr/
Dplat_tbbr.c30 unsigned int nv_ctr) in plat_set_nv_ctr2() argument
45 return plat_set_nv_ctr(cookie, nv_ctr); in plat_set_nv_ctr2()
/trusted-firmware-a-latest/plat/brcm/board/common/
Dboard_arm_trusted_boot.c579 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
584 assert(nv_ctr != NULL); in plat_get_nv_ctr()
586 *nv_ctr = 0; in plat_get_nv_ctr()
591 *nv_ctr = sotp_get_trusted_nvctr(); in plat_get_nv_ctr()
593 *nv_ctr = sotp_get_nontrusted_nvctr(); in plat_get_nv_ctr()
605 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
611 INFO("set CTR %i\n", nv_ctr); in plat_set_nv_ctr()
614 return sotp_set_trusted_nvctr(nv_ctr); in plat_set_nv_ctr()
616 return sotp_set_nontrusted_nvctr(nv_ctr); in plat_set_nv_ctr()
/trusted-firmware-a-latest/plat/arm/board/common/
Dboard_arm_trusted_boot.c207 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
213 assert(nv_ctr != NULL); in plat_get_nv_ctr()
226 *nv_ctr = (unsigned int)(*nv_ctr_addr); in plat_get_nv_ctr()
239 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
/trusted-firmware-a-latest/plat/st/common/
Dstm32mp_trusted_boot.c173 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
176 *nv_ctr = mmio_read_32(TAMP_BASE + TAMP_COUNTR); in plat_get_nv_ctr()
182 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
185 while (mmio_read_32(TAMP_BASE + TAMP_COUNTR) != nv_ctr) { in plat_set_nv_ctr()
/trusted-firmware-a-latest/plat/arm/board/juno/
Djuno_tbbr_cot_bl2.c116 .param.nv_ctr = {
158 .param.nv_ctr = {
190 .param.nv_ctr = {
239 .param.nv_ctr = {
271 .param.nv_ctr = {
342 .param.nv_ctr = {
374 .param.nv_ctr = {
487 .param.nv_ctr = {
519 .param.nv_ctr = {
589 .param.nv_ctr = {
[all …]
/trusted-firmware-a-latest/plat/arm/board/fvp/include/
Dfvp_critical_data.h20 unsigned int nv_ctr[MAX_NV_CTR_IDS]; member
/trusted-firmware-a-latest/drivers/auth/tbbr/
Dtbbr_cot_bl2.c106 .param.nv_ctr = {
148 .param.nv_ctr = {
180 .param.nv_ctr = {
229 .param.nv_ctr = {
261 .param.nv_ctr = {
332 .param.nv_ctr = {
364 .param.nv_ctr = {
477 .param.nv_ctr = {
509 .param.nv_ctr = {
579 .param.nv_ctr = {
Dtbbr_cot_bl1_r64.c58 .param.nv_ctr = {
100 .param.nv_ctr = {
132 .param.nv_ctr = {
/trusted-firmware-a-latest/drivers/nxp/auth/tbbr/
Dtbbr_cot.c151 .param.nv_ctr = {
194 .param.nv_ctr = {
226 .param.nv_ctr = {
297 .param.nv_ctr = {
329 .param.nv_ctr = {
442 .param.nv_ctr = {
474 .param.nv_ctr = {
546 .param.nv_ctr = {
578 .param.nv_ctr = {
689 .param.nv_ctr = {

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