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Searched refs:SUNXI_R_RSB_BASE (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a-3.7.0/drivers/allwinner/
Dsunxi_rsb.c42 reg = mmio_read_32(SUNXI_R_RSB_BASE + offset); in rsb_wait_bit()
60 reg = mmio_read_32(SUNXI_R_RSB_BASE + RSB_STAT); in rsb_wait_stat()
71 mmio_write_32(SUNXI_R_RSB_BASE + RSB_CTRL, 0x01); /* soft reset */ in rsb_init_controller()
80 mmio_write_32(SUNXI_R_RSB_BASE + RSB_CMD, RSBCMD_RD8); /* read a byte */ in rsb_read()
81 mmio_write_32(SUNXI_R_RSB_BASE + RSB_SADDR, rt_addr << 16); in rsb_read()
82 mmio_write_32(SUNXI_R_RSB_BASE + RSB_DADDR0, reg_addr); in rsb_read()
83 mmio_write_32(SUNXI_R_RSB_BASE + RSB_CTRL, 0x80);/* start transaction */ in rsb_read()
89 return mmio_read_32(SUNXI_R_RSB_BASE + RSB_DATA0) & 0xff; /* result */ in rsb_read()
94 mmio_write_32(SUNXI_R_RSB_BASE + RSB_CMD, RSBCMD_WR8); /* byte write */ in rsb_write()
95 mmio_write_32(SUNXI_R_RSB_BASE + RSB_SADDR, rt_addr << 16); in rsb_write()
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/trusted-firmware-a-3.7.0/plat/allwinner/sun50i_h616/include/
Dsunxi_mmap.h43 #define SUNXI_R_RSB_BASE 0x07083000 macro
/trusted-firmware-a-3.7.0/plat/allwinner/sun50i_h6/include/
Dsunxi_mmap.h59 #define SUNXI_R_RSB_BASE 0x07083000 macro
/trusted-firmware-a-3.7.0/plat/allwinner/sun50i_a64/include/
Dsunxi_mmap.h71 #define SUNXI_R_RSB_BASE 0x01f03400 macro