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Searched refs:IGRPEN1_EL1_ENABLE_G0_BIT (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a-3.7.0/include/drivers/arm/
Dgicv3.h291 #define IGRPEN1_EL1_ENABLE_G0_BIT BIT_32(IGRPEN1_EL1_ENABLE_G0_SHIFT) macro
/trusted-firmware-a-3.7.0/drivers/arm/gic/v3/
Dgicv3_main.c328 write_icc_igrpen0_el1(IGRPEN1_EL1_ENABLE_G0_BIT); in gicv3_cpuif_enable()
360 ~IGRPEN1_EL1_ENABLE_G0_BIT); in gicv3_cpuif_disable()