| /trusted-firmware-a-3.4.0/drivers/nxp/console/ |
| D | console_16550.c | 22 struct sysinfo sys; in plat_console_init() local
25 zeromem(&sys, sizeof(sys)); in plat_console_init()
26 if (get_clocks(&sys)) { in plat_console_init()
31 (sys.freq_platform/uart_clk_div), in plat_console_init()
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| D | console_pl011.c | 23 struct sysinfo sys; in plat_console_init() local
26 zeromem(&sys, sizeof(sys)); in plat_console_init()
27 if (get_clocks(&sys)) { in plat_console_init()
33 (sys.freq_platform/uart_clk_div), in plat_console_init()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1046a/ls1046aqds/ |
| D | ddr_init.c | 60 struct sysinfo sys; in init_ddr() local
63 zeromem(&sys, sizeof(sys)); in init_ddr()
64 if (get_clocks(&sys)) { in init_ddr()
68 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
69 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
70 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
75 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1088a/ls1088aqds/ |
| D | ddr_init.c | 61 struct sysinfo sys; in init_ddr() local
64 zeromem(&sys, sizeof(sys)); in init_ddr()
65 get_clocks(&sys); in init_ddr()
66 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
67 debug("DDR PLL %lu\n", sys.freq_ddr_pll0); in init_ddr()
72 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1088a/ls1088ardb/ |
| D | ddr_init.c | 62 struct sysinfo sys; in init_ddr() local
65 zeromem(&sys, sizeof(sys)); in init_ddr()
66 get_clocks(&sys); in init_ddr()
67 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
68 debug("DDR PLL %lu\n", sys.freq_ddr_pll0); in init_ddr()
73 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
|
| /trusted-firmware-a-3.4.0/drivers/nxp/dcfg/ |
| D | dcfg.c | 87 int get_clocks(struct sysinfo *sys) in get_clocks() argument
94 sys->freq_platform = sysclk; in get_clocks()
95 sys->freq_ddr_pll0 = ddrclk; in get_clocks()
96 sys->freq_ddr_pll1 = ddrclk; in get_clocks()
98 sys->freq_platform *= (gur_in32(rcwsr0) >> in get_clocks()
102 sys->freq_platform /= dcfg_init_info->nxp_plat_clk_divider; in get_clocks()
104 sys->freq_ddr_pll0 *= (gur_in32(rcwsr0) >> in get_clocks()
107 sys->freq_ddr_pll1 *= (gur_in32(rcwsr0) >> in get_clocks()
110 if (sys->freq_platform == 0) { in get_clocks()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1043a/ls1043ardb/ |
| D | ddr_init.c | 134 struct sysinfo sys;
137 zeromem(&sys, sizeof(sys));
138 get_clocks(&sys);
139 debug("platform clock %lu\n", sys.freq_platform);
140 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0);
141 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1);
146 info.clk = get_ddr_freq(&sys, 0);
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-lx2160a/lx2160ardb/ |
| D | ddr_init.c | 169 struct sysinfo sys; in init_ddr() local
172 zeromem(&sys, sizeof(sys)); in init_ddr()
173 if (get_clocks(&sys) != 0) { in init_ddr()
177 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
178 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
179 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
190 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
194 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1046a/ls1046afrwy/ |
| D | ddr_init.c | 148 struct sysinfo sys; in init_ddr() local
151 zeromem(&sys, sizeof(sys)); in init_ddr()
152 if (get_clocks(&sys)) { in init_ddr()
156 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
157 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
158 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
163 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
|
| /trusted-firmware-a-3.4.0/tools/memory/ |
| D | print_memory_map.py | 10 import sys
48 if len(sys.argv) >= 2:
49 build_dir = sys.argv[1]
50 if len(sys.argv) >= 3:
51 inverted_print = sys.argv[2] == '0'
|
| /trusted-firmware-a-3.4.0/lib/romlib/ |
| D | romlib_generator.py | 16 import sys
263 if len(sys.argv) < 2 or sys.argv[1] not in APPS:
264 print("usage: romlib_generator.py [%s] [args]" % "|".join(APPS.keys()), file=sys.stderr)
265 sys.exit(1)
267 APP = APPS[sys.argv[1]]("romlib_generator.py " + sys.argv[1])
268 APP.parse_arguments(sys.argv[2:])
271 sys.exit(0)
273 print(file_not_found_error, file=sys.stderr)
275 print(called_process_error.output, file=sys.stderr)
277 sys.exit(1)
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1028a/ls1028ardb/ |
| D | ddr_init.c | 164 struct sysinfo sys; in init_ddr() local
167 zeromem(&sys, sizeof(sys)); in init_ddr()
168 get_clocks(&sys); in init_ddr()
169 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
170 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
175 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
|
| /trusted-firmware-a-3.4.0/drivers/nxp/ddr/nxp-ddr/ |
| D | utility.c | 42 unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num) in get_ddr_freq() argument
44 if (sys->freq_ddr_pll0 == 0) { in get_ddr_freq()
45 get_clocks(sys); in get_ddr_freq()
50 return sys->freq_ddr_pll0; in get_ddr_freq()
52 return sys->freq_ddr_pll0; in get_ddr_freq()
54 return sys->freq_ddr_pll1; in get_ddr_freq()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-ls1046a/ls1046ardb/ |
| D | ddr_init.c | 237 struct sysinfo sys; in init_ddr() local
240 zeromem(&sys, sizeof(sys)); in init_ddr()
241 if (get_clocks(&sys)) { in init_ddr()
245 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
246 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
247 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
252 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
|
| /trusted-firmware-a-3.4.0/tools/sptool/ |
| D | sp_mk_generator.py | 52 import sys
215 def init_sp_actions(sys): argument
216 sp_layout_file = os.path.abspath(sys.argv[2])
221 args["sp_gen_mk"] = os.path.abspath(sys.argv[1])
223 args["out_dir"] = os.path.abspath(sys.argv[3])
224 args["dualroot"] = sys.argv[4] == "dualroot"
231 args, sp_layout = init_sp_actions(sys)
|
| D | sptool.py | 20 import sys
145 sys.exit(Main())
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-lx2160a/lx2160aqds/ |
| D | ddr_init.c | 304 struct sysinfo sys; in init_ddr() local
307 zeromem(&sys, sizeof(sys)); in init_ddr()
308 if (get_clocks(&sys) == 1) { in init_ddr()
312 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
313 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
314 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
|
| /trusted-firmware-a-3.4.0/plat/nxp/soc-lx2160a/lx2162aqds/ |
| D | ddr_init.c | 304 struct sysinfo sys; in init_ddr() local
307 zeromem(&sys, sizeof(sys)); in init_ddr()
308 if (get_clocks(&sys) != 0) { in init_ddr()
312 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
313 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
314 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
|
| /trusted-firmware-a-3.4.0/include/drivers/nxp/ddr/ |
| D | utility.h | 18 unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num);
|
| /trusted-firmware-a-3.4.0/include/drivers/nxp/dcfg/ |
| D | dcfg.h | 84 int get_clocks(struct sysinfo *sys);
|
| /trusted-firmware-a-3.4.0/lib/aarch64/ |
| D | cache_helpers.S | 87 sys #6, c7, c14, #1, x0 /* DC CIPAPA,<Xt> */
|
| D | misc_helpers.S | 610 sys #6, c8, c4, #7, x0 /* TLBI RPALOS, <Xt> */
|
| /trusted-firmware-a-3.4.0/docs/plat/arm/juno/ |
| D | index.rst | 228 echo +10 > /sys/class/rtc/rtc0/wakealarm
229 echo -n mem > /sys/power/state
|
| /trusted-firmware-a-3.4.0/docs/plat/marvell/armada/ |
| D | build.rst | 283 binary and sys-init code from the WTP directory which sets DDR and CPU
362 binary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for
|
| /trusted-firmware-a-3.4.0/docs/ |
| D | change-log.md | 2231 - Delay timer and sys timer
|
