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/nrf_hw_models-3.7.0/src/HW_models/
DNHW_NVMC.c141 struct hw_nvmc_st_t *this = &hw_nvmc_st[inst]; in nhw_nvmc_uicr_init() local
142 this->NVMC_regs = &NRF_NVMC_regs[inst]; in nhw_nvmc_uicr_init()
149 this->flash_op = flash_idle; in nhw_nvmc_uicr_init()
150 this->timer = TIME_NEVER; in nhw_nvmc_uicr_init()
152 this->flash_start_addr = flash_start_addr[inst]; in nhw_nvmc_uicr_init()
153 this->flash_n_pages = flash_n_pages[inst]; in nhw_nvmc_uicr_init()
154 this->flash_page_size = flash_page_sizes[inst]; in nhw_nvmc_uicr_init()
155 this->flash_size = this->flash_n_pages * this->flash_page_size; in nhw_nvmc_uicr_init()
157 nhw_nvm_init_storage(&this->flash_st, &nvmc_args.flash[inst], in nhw_nvmc_uicr_init()
158 this->flash_size, "flash"); in nhw_nvmc_uicr_init()
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Dirq_ctrl.c136 struct intctrl_status *this = &nhw_intctrl_st[inst]; in hw_irq_ctrl_get_highest_prio_irq() local
138 if (this->irqs_locked) { in hw_irq_ctrl_get_highest_prio_irq()
146 uint64_t irq_status = this->irq_status[i]; in hw_irq_ctrl_get_highest_prio_irq()
152 if ((winner_prio > (int)this->irq_prio[irq_nbr]) in hw_irq_ctrl_get_highest_prio_irq()
153 && (this->currently_running_prio > (int)this->irq_prio[irq_nbr])) { in hw_irq_ctrl_get_highest_prio_irq()
155 winner_prio = this->irq_prio[irq_nbr]; in hw_irq_ctrl_get_highest_prio_irq()
174 struct intctrl_status *this = &nhw_intctrl_st[inst]; in hw_irq_ctrl_change_lock() local
175 uint32_t previous_lock = this->irqs_locked; in hw_irq_ctrl_change_lock()
177 this->irqs_locked = new_lock; in hw_irq_ctrl_change_lock()
189 struct intctrl_status *this = &nhw_intctrl_st[inst]; in hw_irq_ctrl_clear_all_enabled_irqs() local
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DNHW_CLOCK.c184 struct clkpwr_status *this = &nhw_clkpwr_st[inst]; in nhw_pwrclk_eval_interrupt() local
188 && (this->INTEN & CLOCK_INTENCLR_##x##_Msk)){ \ in nhw_pwrclk_eval_interrupt()
255 struct clkpwr_status *this = &nhw_clkpwr_st[inst]; in nhw_clock_signal_handler() local
256 NRF_CLOCK_Type *CLOCK_regs = this->CLOCK_regs; in nhw_clock_signal_handler()
260 this->LF_Clock_state = Starting; in nhw_clock_signal_handler()
262 this->Timer_CLOCK_LF = nsi_hws_get_time(); //we assume the clock is ready in 1 delta in nhw_clock_signal_handler()
274 struct clkpwr_status *this = &nhw_clkpwr_st[inst]; in nhw_clock_TASKS_LFCLKSTOP() local
276 if ((this->LF_Clock_state == Started) || (this->LF_Clock_state == Starting)) { in nhw_clock_TASKS_LFCLKSTOP()
278 this->LF_Clock_state = Stopping; in nhw_clock_TASKS_LFCLKSTOP()
279 this->Timer_CLOCK_LF = nsi_hws_get_time(); //we assume the clock is stopped in 1 delta in nhw_clock_TASKS_LFCLKSTOP()
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Dbstest_ticker.c62 static void nhw_bst_ticker_find_next_time_inner(struct bs_ticker_status *this) in nhw_bst_ticker_find_next_time_inner() argument
64 if (this->awake_cpu_asap == true) { in nhw_bst_ticker_find_next_time_inner()
65 this->ticker_timer = nsi_hws_get_time(); //We will awake it in this same microsecond in nhw_bst_ticker_find_next_time_inner()
67 this->ticker_timer = this->ticker_timer_lt; in nhw_bst_ticker_find_next_time_inner()
72 struct bs_ticker_status *this = &bs_ticket_st[inst]; in nhw_bst_ticker_find_next_time() local
74 nhw_bst_ticker_find_next_time_inner(this); in nhw_bst_ticker_find_next_time()
85 struct bs_ticker_status *this = &bs_ticket_st[inst]; in bst_ticker_amp_set_period() local
87 this->tick_period = tick_period; in bst_ticker_amp_set_period()
88 this->ticker_timer_lt = tick_period + nsi_hws_get_time(); in bst_ticker_amp_set_period()
116 struct bs_ticker_status *this = &bs_ticket_st[i]; in nhw_bst_ticker_triggered() local
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DNHW_RTC.c292 struct rtc_status *this = &nhw_rtc_st[rtc]; in get_counter_match_time() local
297 if (this->running == true) { in get_counter_match_time()
301 if(this->counter_startT_sub_us > 0) in get_counter_match_time()
303 *next_match_sub_us = this->counter_startT_sub_us in get_counter_match_time()
306 else if (counter_match_sub_us > this->counter_startT_negative_sub_us) in get_counter_match_time()
308 *next_match_sub_us = counter_match_sub_us - this->counter_startT_negative_sub_us; in get_counter_match_time()
313 + counter_match_sub_us - this->counter_startT_negative_sub_us; in get_counter_match_time()
330 struct rtc_status *this = &nhw_rtc_st[rtc]; in nhw_rtc_update_master_timer() local
332 if (this->running == false) { in nhw_rtc_update_master_timer()
335 for (int cc = 0 ; cc < this->n_CCs ; cc++) { in nhw_rtc_update_master_timer()
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DNHW_TIMER.c215 struct timer_status *this = &nhw_timer_st[t]; in update_cc_timer() local
217 if ((this->is_running == true) && (NRF_TIMER_regs[t].MODE == 0)) { in update_cc_timer()
218 bs_time_t next_match = this->start_t in update_cc_timer()
223 this->CC_timers[cc] = next_match; in update_cc_timer()
225 this->CC_timers[cc] = TIME_NEVER; in update_cc_timer()
240 struct timer_status *this = &nhw_timer_st[t]; in nhw_timer_eval_interrupts() local
243 for (int cc = 0; cc < this->n_CCs; cc++) { in nhw_timer_eval_interrupts()
244 int mask = this->INTEN & (TIMER_INTENSET_COMPARE0_Msk << cc); in nhw_timer_eval_interrupts()
264 struct timer_status *this = &nhw_timer_st[t]; in nhw_timer_TASK_START() local
267 if (this->is_running == false) { in nhw_timer_TASK_START()
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DNHW_DPPI.c193 struct dppi_status *this = &nhw_dppi_st[dppi_inst]; in nhw_dppi_check_ch_valid() local
194 if (this->registry == NULL) { /* LCOV_EXCL_START */ in nhw_dppi_check_ch_valid()
199 if (ch_n >= this->n_ch) { in nhw_dppi_check_ch_valid()
202 __func__, type, ch_n, this->n_ch, dppi_inst); in nhw_dppi_check_ch_valid()
212 struct dppi_status *this = &nhw_dppi_st[dppi_inst]; in nhw_dppi_check_chg_valid() local
214 if (this->registry == NULL) { /* LCOV_EXCL_START */ in nhw_dppi_check_chg_valid()
219 if (chg_n >= this->n_chg) { in nhw_dppi_check_chg_valid()
222 __func__, type, chg_n, this->n_chg, dppi_inst); in nhw_dppi_check_chg_valid()
247 struct dppi_status *this = &nhw_dppi_st[dppi_inst]; in nhw_dppi_channel_subscribe() local
248 struct dppi_registry_el *ch_reg = this->registry[ch_n]; in nhw_dppi_channel_subscribe()
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DNHW_RRAMC.c111 struct hw_rramc_st_t *this = &hw_rramc_st[inst]; in nhw_RRAMC_uicr_init() local
112 this->RRAMC_regs = &NRF_RRAMC_regs[inst]; in nhw_RRAMC_uicr_init()
124 this->rram_start_addr = rram_start_addr[inst]; in nhw_RRAMC_uicr_init()
125 this->rram_size = rram_size[inst]; in nhw_RRAMC_uicr_init()
127 nhw_nvm_init_storage(&this->rram_st, &nvmc_args.rram[inst], in nhw_RRAMC_uicr_init()
128 this->rram_size, "RRAM"); in nhw_RRAMC_uicr_init()
130 this->uicr_size = uicr_size[inst]; in nhw_RRAMC_uicr_init()
131 nhw_nvm_init_storage(&this->uicr_st, &nvmc_args.uicr[inst], in nhw_RRAMC_uicr_init()
132 this->uicr_size, "UICR"); in nhw_RRAMC_uicr_init()
134 NRF_UICR_regs_p[inst] = (NRF_UICR_Type *)this->uicr_st.storage; in nhw_RRAMC_uicr_init()
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DNHW_EGU.c97 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_eval_interrupt() local
99 NRF_EGU_Type *EGU_regs = this->NRF_EGU_regs; in nhw_egu_eval_interrupt()
102 for (int i = 0; i < this->n_events; i++) { in nhw_egu_eval_interrupt()
124 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_signal_EVENTS_TRIGGERED() local
125 NRF_EGU_Type *EGU_regs = this->NRF_EGU_regs; in nhw_egu_signal_EVENTS_TRIGGERED()
144 nhw_dppi_event_signal_if(this->dppi_map, in nhw_egu_signal_EVENTS_TRIGGERED()
166 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_regw_sideeffects_SUBSCRIBE_TRIGGER() local
170 nhw_dppi_common_subscribe_sideeffect(this->dppi_map, in nhw_egu_regw_sideeffects_SUBSCRIBE_TRIGGER()
171 this->NRF_EGU_regs->SUBSCRIBE_TRIGGER[n], in nhw_egu_regw_sideeffects_SUBSCRIBE_TRIGGER()
172 &this->subscribed[n], in nhw_egu_regw_sideeffects_SUBSCRIBE_TRIGGER()
DNHW_IPC.c86 struct ipc_status *this = &nhw_ipc_st[inst]; in nhw_IPC_eval_interrupt() local
91 for (int i = 0; i < this->n_ch; i++) { in nhw_IPC_eval_interrupt()
160 struct ipc_status *this = &nhw_ipc_st[inst]; in nhw_IPC_regw_sideeffects_SUBSCRIBE_SEND() local
164 nhw_dppi_common_subscribe_sideeffect(this->dppi_map, in nhw_IPC_regw_sideeffects_SUBSCRIBE_SEND()
165 this->NRF_IPC_regs->SUBSCRIBE_SEND[ch], in nhw_IPC_regw_sideeffects_SUBSCRIBE_SEND()
166 &this->subscribed[ch], in nhw_IPC_regw_sideeffects_SUBSCRIBE_SEND()
DNHW_PPIB.c151 struct ppib_status *this = &nhw_ppib_st[inst]; in nhw_PPIB_regw_sideeffects_SUBSCRIBE_SEND() local
157 nhw_dppi_common_subscribe_sideeffect(this->dppi_map, in nhw_PPIB_regw_sideeffects_SUBSCRIBE_SEND()
158 this->NRF_PPIB_regs->SUBSCRIBE_SEND[ppib_ch], in nhw_PPIB_regw_sideeffects_SUBSCRIBE_SEND()
159 &this->subscribed[ppib_ch], in nhw_PPIB_regw_sideeffects_SUBSCRIBE_SEND()
DNHW_GRTC.c236 struct grtc_status *this = &nhw_grtc_st; in nhw_GRTC_eval_interrupt() local
240 for (int irql = 0; irql < this->n_int; irql++) { in nhw_GRTC_eval_interrupt()
246 for (int i = 0; i < this->n_cc; i++) { in nhw_GRTC_eval_interrupt()
265 &this->int_map[irql]); in nhw_GRTC_eval_interrupt()
375 struct grtc_status *this = &nhw_grtc_st; in nhw_GRTC_regw_sideeffects_SUBSCRIBE_CAPTURE() local
379 nhw_dppi_common_subscribe_sideeffect(this->dppi_map, in nhw_GRTC_regw_sideeffects_SUBSCRIBE_CAPTURE()
380 this->NRF_GRTC_regs->SUBSCRIBE_CAPTURE[cc_n], in nhw_GRTC_regw_sideeffects_SUBSCRIBE_CAPTURE()
381 &this->subscribed[cc_n], in nhw_GRTC_regw_sideeffects_SUBSCRIBE_CAPTURE()
DNHW_UART.c1113 struct uarte_status *this = &nhw_uarte_st[inst]; \
1115 nhw_dppi_common_subscribe_sideeffect(this->dppi_map, \
1116 this->UARTE_regs[inst]->SUBSCRIBE_##TASK_N,\
/nrf_hw_models-3.7.0/src/nrfx/hal/
DREADME.md7 using this repository HW models.
9 There is two main differences in this HAL compared to the real one:
22 When using the HW models, doing this write in itself would only change
32 Note that this replacement HAL only provides the necessary replacements for the subset of the
/nrf_hw_models-3.7.0/docs/
DUART.md20 Enabling this and selecting the file is done with command line options.
21 When enabled, the model will dump one line in this file per byte, with two columns:
48 For this it uses one Linux FIFO (named pipe) for Tx and another for Rx.
51 Therefore you cannot connect this backend to a console, or real devices.
53 You enable this backend for each instance using command line parameters, by specifying
63 terminate the simulation; But you can change this with a command line option, so that it will
69 and that it toggles RTS while there are still 4 spaces left. So even though this will, in some case…
80 To do this, just configure the same FIFO file name for both the Rx and Tx, for example like:
DLICENSE17 and distribution as defined by Sections 1 through 9 of this document.
24 control with that entity. For the purposes of this definition,
31 exercising permissions granted by this License.
51 of this License, Derivative Works shall not include works that remain
60 the copyright owner. For the purposes of this definition, "submitted"
74 this License, each Contributor hereby grants to You a perpetual,
81 this License, each Contributor hereby grants to You a perpetual,
83 (except as stated in this section) patent license to make, have made,
93 granted to You under this License for that Work shall terminate
102 Derivative Works a copy of this License; and
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DREADME_HW_models.md51 In this model, all of these events|timers types and their callbacks are known
65 In this case, they will be handled in different "delta cycles" in that same microsecond.
83 to access this structure instead.
84 In Zephyr's nrf5*_bsim case, this is achieved by providing a version of the
88 Writing to this structure in itself will only cause that memory location to be
89 changed. For many registers this is perfectly fine, as that is just the same
98 this is achieved by calling `nhw_<periperal>_regw_sideeffects_<register name>()`
100 In Zephyr's nrf5*_bsim case, this is done in the replacement nRFx HAL function.
142 is reached, this function is called to perform
166 By default this overall scheduler is provided by the native simulator
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DGPIO.md31 For this just call the excutable with `-gpio_out_file=<path>`.
DREADME.md22 When compiling this component using the provided Makefile (not with Zephyr's build system),
/nrf_hw_models-3.7.0/
DCMakeLists.txt4 # CMake file to compile this BabbleSim component as a west module in Zephyr