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Searched refs:uint8_t (Results 1 – 25 of 597) sorted by relevance

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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_gpio_ex.h71 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping …
72 #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping …
73 #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping …
74 #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping …
79 #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
80 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
81 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
82 #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */
87 #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */
88 #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */
[all …]
Dstm32l4xx_hal_cortex.h66 uint8_t Enable; /*!< Specifies the status of the region.
68 uint8_t Number; /*!< Specifies the number of the region to protect.
71 uint8_t Size; /*!< Specifies the size of the region to protect.
73uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protectio…
75 uint8_t TypeExtField; /*!< Specifies the TEX field level.
77 uint8_t AccessPermission; /*!< Specifies the region access permission type.
79 uint8_t DisableExec; /*!< Specifies the instruction access status.
81uint8_t IsShareable; /*!< Specifies the shareability status of the protec…
83uint8_t IsCacheable; /*!< Specifies the cacheable status of the region pr…
85uint8_t IsBufferable; /*!< Specifies the bufferable status of the protecte…
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Dstm32l4xx_hal_hash_ex.h70 …Def HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t*…
71 HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint3…
72 …Def HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t*…
73 HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint3…
83 … HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t*…
84 … HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t*…
93 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32…
94 HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t…
95 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32…
96 HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t…
[all …]
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_gpio_ex.h178 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
179 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
180 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
181 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
182 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
183 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
184 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
185 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
186 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
187 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
[all …]
Dstm32l0xx_hal_cortex.h68 uint8_t Enable; /*!< Specifies the status of the region.
70 uint8_t Number; /*!< Specifies the number of the region to protect.
73 uint8_t Size; /*!< Specifies the size of the region to protect.
75uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protectio…
77uint8_t TypeExtField; /*!< This parameter is NOT used but is kept to keep …
79 uint8_t AccessPermission; /*!< Specifies the region access permission type.
81 uint8_t DisableExec; /*!< Specifies the instruction access status.
83uint8_t IsShareable; /*!< Specifies the shareability status of the protec…
85uint8_t IsCacheable; /*!< Specifies the cacheable status of the region pr…
87uint8_t IsBufferable; /*!< Specifies the bufferable status of the protecte…
[all …]
Dstm32l0xx_hal_cryp.h71 uint8_t* pKey; /*!< The key used for encryption/decryption */
73 uint8_t* pInitVect; /*!< The initialization vector used also as initialization
109uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decrypt…
111uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decrypt…
334 … HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t
335 … HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t
336 … HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t
337 … HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t
338 … HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t
339 … HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_sd.h110 __IO uint8_t CSDStruct; /*!< CSD structure */
111 __IO uint8_t SysSpecVersion; /*!< System specification version */
112 __IO uint8_t Reserved1; /*!< Reserved */
113 __IO uint8_t TAAC; /*!< Data read access time 1 */
114 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
115 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
117 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
118 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
119 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
120 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
[all …]
Dstm32l1xx_hal_cortex.h67 uint8_t Enable; /*!< Specifies the status of the region.
69 uint8_t Number; /*!< Specifies the number of the region to protect.
72 uint8_t Size; /*!< Specifies the size of the region to protect.
74uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protectio…
76 uint8_t TypeExtField; /*!< Specifies the TEX field level.
78 uint8_t AccessPermission; /*!< Specifies the region access permission type.
80 uint8_t DisableExec; /*!< Specifies the instruction access status.
82uint8_t IsShareable; /*!< Specifies the shareability status of the protec…
84uint8_t IsCacheable; /*!< Specifies the cacheable status of the region pr…
86uint8_t IsBufferable; /*!< Specifies the bufferable status of the protecte…
[all …]
Dstm32l1xx_hal_gpio_ex.h66 #define GPIO_AF0_MCO ((uint8_t)0x00) /*!< MCO Alternate Function mapping …
67 #define GPIO_AF0_TAMPER ((uint8_t)0x00) /*!< TAMPER Alternate Function mapping …
68 #define GPIO_AF0_SWJ ((uint8_t)0x00) /*!< SWJ (SWD and JTAG) Alternate Function mapping …
69 #define GPIO_AF0_TRACE ((uint8_t)0x00) /*!< TRACE Alternate Function mapping …
70 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /*!< RTC_OUT Alternate Function mapping …
73 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /*!< TIM2 Alternate Function mapping */
76 #define GPIO_AF2_TIM3 ((uint8_t)0x02) /*!< TIM3 Alternate Function mapping */
77 #define GPIO_AF2_TIM4 ((uint8_t)0x02) /*!< TIM4 Alternate Function mapping */
79 #define GPIO_AF2_TIM5 ((uint8_t)0x02) /*!< TIM5 Alternate Function mapping */
84 #define GPIO_AF3_TIM9 ((uint8_t)0x03) /*!< TIM9 Alternate Function mapping */
[all …]
Dstm32l1xx_hal_cryp.h71 uint8_t* pKey; /*!< The key used for encryption/decryption */
73 uint8_t* pInitVect; /*!< The initialization vector used also as initialization
109uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decrypt…
111uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decrypt…
334 … HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t
335 … HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t
336 … HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t
337 … HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t
338 … HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t
339 … HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t
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/loramac-node-3.4.0/src/radio/sx126x/
Dsx126x.c57 uint8_t Value; //!< The value of the register
145 void SX126xSetPayload( uint8_t *payload, uint8_t size ) in SX126xSetPayload()
150 uint8_t SX126xGetPayload( uint8_t *buffer, uint8_t *size, uint8_t maxSize ) in SX126xGetPayload()
152 uint8_t offset = 0; in SX126xGetPayload()
163 void SX126xSendPayload( uint8_t *payload, uint8_t size, uint32_t timeout ) in SX126xSendPayload()
169 uint8_t SX126xSetSyncWord( uint8_t *syncWord ) in SX126xSetSyncWord()
177 uint8_t buf[2]; in SX126xSetCrcSeed()
179 buf[0] = ( uint8_t )( ( seed >> 8 ) & 0xFF ); in SX126xSetCrcSeed()
180 buf[1] = ( uint8_t )( seed & 0xFF ); in SX126xSetCrcSeed()
195 uint8_t buf[2]; in SX126xSetCrcPolynomial()
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Dsx126x.h194 uint8_t Value;
197 uint8_t : 1; //!< Reserved
198 uint8_t CmdStatus : 3; //!< Command status
199 uint8_t ChipMode : 3; //!< Chip mode
200 uint8_t : 1; //!< Reserved
570 uint8_t Bandwidth;
577uint8_t LowDatarateOptimize; //!< Indicates if the modem uses the low datarat…
597uint8_t SyncWordLength; //!< The synchronization word length for GFSK pack…
600uint8_t PayloadLength; //!< Size of the payload in the GFSK packet
611uint8_t PayloadLength; //!< Size of the payload in the LoRa packet
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/loramac-node-3.4.0/src/apps/LoRaMac/common/
DCayenneLpp.h61 uint8_t CayenneLppGetSize( void );
62 uint8_t* CayenneLppGetBuffer( void );
63 uint8_t CayenneLppCopy( uint8_t* buffer );
65 uint8_t CayenneLppAddDigitalInput( uint8_t channel, uint8_t value );
66 uint8_t CayenneLppAddDigitalOutput( uint8_t channel, uint8_t value );
68 uint8_t CayenneLppAddAnalogInput( uint8_t channel, float value );
69 uint8_t CayenneLppAddAnalogOutput( uint8_t channel, float value );
71 uint8_t CayenneLppAddLuminosity( uint8_t channel, uint16_t lux );
72 uint8_t CayenneLppAddPresence( uint8_t channel, uint8_t value );
73 uint8_t CayenneLppAddTemperature( uint8_t channel, float celsius );
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/loramac-node-3.4.0/src/peripherals/soft-se/
Daes.h64 typedef uint8_t return_type;
70 typedef uint8_t length_type;
73 { uint8_t ksch[(N_MAX_ROUNDS + 1) * N_BLOCK];
74 uint8_t rnd;
87 return_type aes_set_key( const uint8_t key[],
94 return_type aes_encrypt( const uint8_t in[N_BLOCK],
95 uint8_t out[N_BLOCK],
98 return_type aes_cbc_encrypt( const uint8_t *in,
99 uint8_t *out,
101 uint8_t iv[N_BLOCK],
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Daes.c194 static const uint8_t sbox[256] = sb_data(f1);
197 static const uint8_t isbox[256] = isb_data(f1);
200 static const uint8_t gfm2_sbox[256] = sb_data(f2);
201 static const uint8_t gfm3_sbox[256] = sb_data(f3);
204 static const uint8_t gfmul_9[256] = mm_data(f9);
205 static const uint8_t gfmul_b[256] = mm_data(fb);
206 static const uint8_t gfmul_d[256] = mm_data(fd);
207 static const uint8_t gfmul_e[256] = mm_data(fe);
229 static uint8_t hibit(const uint8_t x) in hibit()
230 { uint8_t r = (uint8_t)((x >> 1) | (x >> 2)); in hibit()
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/loramac-node-3.4.0/src/mac/
DLoRaMac.h199 uint8_t Datarate;
252 uint8_t MinRxSymbols;
276 uint8_t ChannelsNbTrans;
280 uint8_t Rx1DrOffset;
292 uint8_t UplinkDwellTime;
296 uint8_t DownlinkDwellTime;
317 uint8_t Value;
327 uint8_t Periodicity : 3;
331 uint8_t RFU : 5;
354 uint8_t Datarate;
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DLoRaMacMessageTypes.h56 uint8_t* Buffer;
60 uint8_t BufSize;
68 uint8_t JoinEUI[LORAMAC_JOIN_EUI_FIELD_SIZE];
72 uint8_t DevEUI[LORAMAC_DEV_EUI_FIELD_SIZE];
91 uint8_t* Buffer;
95 uint8_t BufSize;
103 uint8_t ReJoinType;
107 uint8_t JoinEUI[LORAMAC_JOIN_EUI_FIELD_SIZE];
111 uint8_t DevEUI[LORAMAC_DEV_EUI_FIELD_SIZE];
130 uint8_t* Buffer;
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32_USB_Device_Library/Core/Inc/
Dusbd_def.h151 uint8_t bmRequest;
152 uint8_t bRequest;
162 uint8_t (*Init) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx);
163 uint8_t (*DeInit) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx);
165 uint8_t (*Setup) (struct _USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req);
166 uint8_t (*EP0_TxSent) (struct _USBD_HandleTypeDef *pdev );
167 uint8_t (*EP0_RxReady) (struct _USBD_HandleTypeDef *pdev );
169 uint8_t (*DataIn) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum);
170 uint8_t (*DataOut) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum);
171 uint8_t (*SOF) (struct _USBD_HandleTypeDef *pdev);
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/loramac-node-3.4.0/src/peripherals/
Dmma8451.c30 static uint8_t I2cDeviceAddr = 0;
41 LmnStatus_t MMA8451Write( uint8_t addr, uint8_t data );
51 LmnStatus_t MMA8451WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size );
60 LmnStatus_t MMA8451Read( uint8_t addr, uint8_t *data );
70 LmnStatus_t MMA8451ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size );
77 void MMA8451SetDeviceAddr( uint8_t addr );
84 uint8_t MMA8451GetDeviceAddr( void );
88 uint8_t regVal = 0; in MMA8451Init()
121 LmnStatus_t MMA8451Write( uint8_t addr, uint8_t data ) in MMA8451Write()
126 LmnStatus_t MMA8451WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in MMA8451WriteBuffer()
[all …]
Dmpl3115.c34 static uint8_t I2cDeviceAddr = 0;
58 LmnStatus_t MPL3115Write( uint8_t addr, uint8_t data );
69 LmnStatus_t MPL3115WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size );
79 LmnStatus_t MPL3115Read( uint8_t addr, uint8_t *data );
90 LmnStatus_t MPL3115ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size );
97 void MPL3115SetDeviceAddr( uint8_t addr );
104 uint8_t MPL3115GetDeviceAddr( void );
134 uint8_t regVal = 0; in MPL3115Init()
168 LmnStatus_t MPL3115Write( uint8_t addr, uint8_t data ) in MPL3115Write()
173 LmnStatus_t MPL3115WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in MPL3115WriteBuffer()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_nand.c340 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_READID; in HAL_NAND_Read_ID()
342 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; in HAL_NAND_Read_ID()
403 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0xFF; in HAL_NAND_Reset()
445 …D_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_… in HAL_NAND_Read_Page_8b()
476 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A; in HAL_NAND_Read_Page_8b()
484 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; in HAL_NAND_Read_Page_8b()
486 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress); in HAL_NAND_Read_Page_8b()
488 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress); in HAL_NAND_Read_Page_8b()
493 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; in HAL_NAND_Read_Page_8b()
495 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress); in HAL_NAND_Read_Page_8b()
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/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Ddac.h45 uint8_t SWRST:1; /*!< bit: 0 Software Reset */
46 uint8_t ENABLE:1; /*!< bit: 1 Enable DAC Controller */
47 uint8_t :6; /*!< bit: 2.. 7 Reserved */
49 uint8_t reg; /*!< Type used for register access */
66 uint8_t DIFF:1; /*!< bit: 0 Differential mode enable */
67 uint8_t REFSEL:2; /*!< bit: 1.. 2 Reference Selection for DAC0/1 */
68 uint8_t :5; /*!< bit: 3.. 7 Reserved */
70 uint8_t reg; /*!< Type used for register access */
96 uint8_t STARTEI0:1; /*!< bit: 0 Start Conversion Event Input DAC 0 */
97 uint8_t STARTEI1:1; /*!< bit: 1 Start Conversion Event Input DAC 1 */
[all …]
Dusb.h45 uint8_t SWRST:1; /*!< bit: 0 Software Reset */
46 uint8_t ENABLE:1; /*!< bit: 1 Enable */
47 uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby Mode */
48 uint8_t :4; /*!< bit: 3.. 6 Reserved */
49 uint8_t MODE:1; /*!< bit: 7 Operating Mode */
51 uint8_t reg; /*!< Type used for register access */
76 uint8_t SWRST:1; /*!< bit: 0 Software Reset Synchronization Busy */
77 uint8_t ENABLE:1; /*!< bit: 1 Enable Synchronization Busy */
78 uint8_t :6; /*!< bit: 2.. 7 Reserved */
80 uint8_t reg; /*!< Type used for register access */
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/loramac-node-3.4.0/src/mac/region/
DRegionCommon.h125 uint8_t NbRep;
137 uint8_t ChMaskCtrl;
153 uint8_t Status;
169 uint8_t NbRep;
185 uint8_t NbChannels;
217 const uint8_t* Datarates;
225 uint8_t BeaconSize;
229 uint8_t BeaconDatarate;
233 uint8_t BeaconChannelBW;
253 uint8_t Datarate;
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32_USB_Device_Library/Class/CDC/Src/
Dusbd_cdc.c107 static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev,
108 uint8_t cfgidx);
110 static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev,
111 uint8_t cfgidx);
113 static uint8_t USBD_CDC_Setup (USBD_HandleTypeDef *pdev,
116 static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev,
117 uint8_t epnum);
119 static uint8_t USBD_CDC_DataOut (USBD_HandleTypeDef *pdev,
120 uint8_t epnum);
122 static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev);
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