| /Zephyr-latest/soc/mediatek/mt8xxx/ |
| D | cpuclk.c | 78 static inline void delay_us(int us) in delay_us() function
91 delay_us(1); in set_pll_power()
93 delay_us(1); in set_pll_power()
95 delay_us(20); in set_pll_power()
98 delay_us(1); in set_pll_power()
100 delay_us(1); in set_pll_power()
|
| /Zephyr-latest/drivers/w1/ |
| D | w1_ds2477_85_common.c | 104 uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_reset; in ds2477_85_reset_bus() local
110 ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_RESET, &tx_data, 1, &rx_data, 1); in ds2477_85_reset_bus()
128 uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot; in ds2477_85_read_bit() local
132 ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_READ_BIT, NULL, 0, &rx_data, 1); in ds2477_85_read_bit()
144 uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot; in ds2477_85_write_bit() local
149 ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_WRITE_BIT, &tx_data, 1, &rx_data, 1); in ds2477_85_write_bit()
161 uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot * 8; in ds2477_85_read_byte() local
165 ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_READ_BYTE, NULL, 0, &rx_data, 1); in ds2477_85_read_byte()
177 uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot * 8; in ds2477_85_write_byte() local
181 ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_WRITE_BYTE, &tx_byte, 1, &rx_data, 1); in ds2477_85_write_byte()
|
| /Zephyr-latest/drivers/mdio/ |
| D | mdio_dwcxgmac.c | 58 uint32_t delay_us = CONFIG_MDIO_DWCXGMAC_STATUS_BUSY_CHECK_TIMEOUT; in dwxgmac_software_reset() local
65 ret = WAIT_FOR(!(sys_read32(reg_addr) & DMA_MODE_SWR_SET_MSK), delay_us, k_msleep(1)); in dwxgmac_software_reset()
75 uint32_t delay_us = CONFIG_MDIO_DWCXGMAC_STATUS_BUSY_CHECK_TIMEOUT; in mdio_busy_wait() local
78 ret = WAIT_FOR(!(sys_read32(reg_addr) & bit_msk), delay_us, k_msleep(1)); in mdio_busy_wait()
|
| /Zephyr-latest/drivers/regulator/ |
| D | regulator_common.c | 10 static void regulator_delay(uint32_t delay_us) in regulator_delay() argument
12 if (delay_us > 0U) { in regulator_delay()
13 k_sleep(K_USEC(delay_us)); in regulator_delay()
|
| /Zephyr-latest/drivers/ethernet/ |
| D | eth_numaker.c | 98 uint32_t delay_us; in reset_phy() local
103 delay_us = 200000U; in reset_phy()
105 delay_us, k_msleep(1)); in reset_phy()
113 delay_us = 3000000U; in reset_phy()
114 ret = WAIT_FOR(numaker_eth_link_ok(gmacdev), delay_us, k_msleep(1)); in reset_phy()
127 delay_us = 3000000U; in reset_phy()
130 delay_us, k_msleep(1)); in reset_phy()
|
| /Zephyr-latest/include/zephyr/drivers/ |
| D | mipi_dbi.h | 351 uint32_t delay_us) in mipi_dbi_configure_te() argument
359 return api->configure_te(dev, edge, K_USEC(delay_us)); in mipi_dbi_configure_te()
|
| /Zephyr-latest/drivers/ieee802154/ |
| D | ieee802154_b91.c | 256 delay_us(CONFIG_IEEE802154_B91_SET_TXRX_DELAY_US); in b91_send_ack()
503 delay_us(CONFIG_IEEE802154_B91_SET_TXRX_DELAY_US); in b91_start()
520 delay_us(CONFIG_IEEE802154_B91_SET_TXRX_DELAY_US); in b91_stop()
556 delay_us(CONFIG_IEEE802154_B91_SET_TXRX_DELAY_US); in b91_tx()
|
| /Zephyr-latest/drivers/mipi_dbi/ |
| D | mipi_dbi_nxp_lcdic.c | 655 uint32_t delay_us = k_ticks_to_us_ceil32(delay.ticks); in mipi_dbi_lcdic_configure_te() local
675 ttew *= delay_us; in mipi_dbi_lcdic_configure_te()
680 if ((ttew == 0) && (delay_us != 0)) { in mipi_dbi_lcdic_configure_te()
|
| /Zephyr-latest/drivers/sensor/bosch/bmi270/ |
| D | bmi270.h | 360 uint32_t delay_us);
|
| D | bmi270.c | 60 uint32_t delay_us) in bmi270_reg_write_with_delay() argument
66 k_usleep(delay_us); in bmi270_reg_write_with_delay()
|
| /Zephyr-latest/drivers/sensor/bosch/bmi160/ |
| D | bmi160.c | 193 uint16_t delay_us; /* values taken from page 82 */ in bmi160_pmu_set() member
213 k_busy_wait(cmds[i].delay_us); in bmi160_pmu_set()
|
| /Zephyr-latest/modules/nrf_wifi/os/ |
| D | shim.c | 968 .delay_us = k_usleep,
|
