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Searched refs:TAL_DMACPUSEL0_CH5_Pos (Results 1 – 2 of 2) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dtal.h436 #define TAL_DMACPUSEL0_CH5_Pos 10 /**< \brief (TAL_DMACPUSEL0) DMA Channel 5 Interru… macro
437 #define TAL_DMACPUSEL0_CH5_Msk (_U(0x1) << TAL_DMACPUSEL0_CH5_Pos)
438 #define TAL_DMACPUSEL0_CH5(value) (TAL_DMACPUSEL0_CH5_Msk & ((value) << TAL_DMACPUSEL0_CH5_Pos))
/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_tal_l21.h981 tmp = (tmp & TAL_DMACPUSEL0_CH5_Msk) >> TAL_DMACPUSEL0_CH5_Pos; in hri_tal_get_DMACPUSEL0_CH5_bit()
991 tmp |= value << TAL_DMACPUSEL0_CH5_Pos; in hri_tal_write_DMACPUSEL0_CH5_bit()