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Searched refs:MPU_RASR_C_Msk (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/include/zephyr/arch/arm/mpu/
Darm_mpu_v7m.h51 #define NORMAL_OUTER_INNER_WRITE_THROUGH_SHAREABLE (MPU_RASR_C_Msk | MPU_RASR_S_Msk)
52 #define NORMAL_OUTER_INNER_WRITE_THROUGH_NON_SHAREABLE MPU_RASR_C_Msk
55 (MPU_RASR_C_Msk | MPU_RASR_B_Msk | MPU_RASR_S_Msk)
57 #define NORMAL_OUTER_INNER_WRITE_BACK_NON_SHAREABLE (MPU_RASR_C_Msk | MPU_RASR_B_Msk)
61 ((1 << MPU_RASR_TEX_Pos) | MPU_RASR_C_Msk | MPU_RASR_B_Msk | MPU_RASR_S_Msk)
63 ((1 << MPU_RASR_TEX_Pos) | MPU_RASR_C_Msk | MPU_RASR_B_Msk)
/Zephyr-latest/soc/xlnx/zynqmp/
Darm_mpu_regions.c13 | MPU_RASR_C_Msk \
/Zephyr-latest/soc/renode/cortex_r8_virtual/
Darm_mpu_regions.c14 | MPU_RASR_C_Msk \
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/
Dmpu.h30 #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) macro