1 /*
2  * Copyright (c) 2017 RnDity Sp. z o.o.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32F0 processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 #include <stm32_ll_system.h>
15 #include <zephyr/linker/linker-defs.h>
16 #include <string.h>
17 
18 #include <cmsis_core.h>
19 
20 #if defined(CONFIG_SW_VECTOR_RELAY) || defined(CONFIG_SW_VECTOR_RELAY_CLIENT)
21 extern void *_vector_table_pointer;
22 #endif
23 
24 /**
25  * @brief Relocate vector table to SRAM.
26  *
27  * On Cortex-M0 platforms, the Vector Base address cannot be changed.
28  *
29  * A Zephyr image that is run from the mcuboot bootloader must relocate the
30  * vector table to SRAM to be able to replace the vectors pointing to the
31  * bootloader.
32  *
33  * A zephyr image that is a bootloader does not have to relocate the
34  * vector table.
35  *
36  * Alternatively both switches SW_VECTOR_RELAY (for Bootloader image) and
37  * SW_VECTOR_RELAY_CLIENT (for image loaded by a bootloader) can be used to
38  * adds a vector table relay handler and a vector relay table, to relay
39  * interrupts based on a vector table pointer.
40  *
41  * Replaces the default function from prep_c.c.
42  *
43  * @note Zephyr applications that will not be loaded by a bootloader should
44  *       pretend to be a bootloader if the SRAM vector table is not needed.
45  */
relocate_vector_table(void)46 void relocate_vector_table(void)
47 {
48 #if defined(CONFIG_SW_VECTOR_RELAY) || defined(CONFIG_SW_VECTOR_RELAY_CLIENT)
49 	_vector_table_pointer = _vector_start;
50 #elif defined(CONFIG_SRAM_VECTOR_TABLE)
51 	extern char _ram_vector_start[];
52 
53 	size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
54 
55 	memcpy(_ram_vector_start, _vector_start, vector_size);
56 	LL_SYSCFG_SetRemapMemory(LL_SYSCFG_REMAP_SRAM);
57 #endif
58 }
59 
60 /**
61  * @brief Perform basic hardware initialization at boot.
62  *
63  * This needs to be run from the very beginning.
64  */
soc_early_init_hook(void)65 void soc_early_init_hook(void)
66 {
67 	/* Enable ART Accelerator prefetch */
68 	LL_FLASH_EnablePrefetch();
69 
70 	/* Update CMSIS SystemCoreClock variable (HCLK) */
71 	/* At reset, system core clock is set to 8 MHz from HSI */
72 	SystemCoreClock = 8000000;
73 }
74