Searched refs:DRVCTRL (Results 1 – 4 of 4) sorted by relevance
5330 ((Tcc *)hw)->DRVCTRL.reg |= TCC_DRVCTRL_NRE0; in hri_tcc_set_DRVCTRL_NRE0_bit()5337 tmp = ((Tcc *)hw)->DRVCTRL.reg; in hri_tcc_get_DRVCTRL_NRE0_bit()5346 tmp = ((Tcc *)hw)->DRVCTRL.reg; in hri_tcc_write_DRVCTRL_NRE0_bit()5349 ((Tcc *)hw)->DRVCTRL.reg = tmp; in hri_tcc_write_DRVCTRL_NRE0_bit()5356 ((Tcc *)hw)->DRVCTRL.reg &= ~TCC_DRVCTRL_NRE0; in hri_tcc_clear_DRVCTRL_NRE0_bit()5363 ((Tcc *)hw)->DRVCTRL.reg ^= TCC_DRVCTRL_NRE0; in hri_tcc_toggle_DRVCTRL_NRE0_bit()5370 ((Tcc *)hw)->DRVCTRL.reg |= TCC_DRVCTRL_NRE1; in hri_tcc_set_DRVCTRL_NRE1_bit()5377 tmp = ((Tcc *)hw)->DRVCTRL.reg; in hri_tcc_get_DRVCTRL_NRE1_bit()5386 tmp = ((Tcc *)hw)->DRVCTRL.reg; in hri_tcc_write_DRVCTRL_NRE1_bit()5389 ((Tcc *)hw)->DRVCTRL.reg = tmp; in hri_tcc_write_DRVCTRL_NRE1_bit()[all …]
1937 ((Tc *)hw)->COUNT8.DRVCTRL.reg |= TC_DRVCTRL_INVEN0; in hri_tc_set_DRVCTRL_INVEN0_bit()1944 tmp = ((Tc *)hw)->COUNT8.DRVCTRL.reg; in hri_tc_get_DRVCTRL_INVEN0_bit()1953 tmp = ((Tc *)hw)->COUNT8.DRVCTRL.reg; in hri_tc_write_DRVCTRL_INVEN0_bit()1956 ((Tc *)hw)->COUNT8.DRVCTRL.reg = tmp; in hri_tc_write_DRVCTRL_INVEN0_bit()1963 ((Tc *)hw)->COUNT8.DRVCTRL.reg &= ~TC_DRVCTRL_INVEN0; in hri_tc_clear_DRVCTRL_INVEN0_bit()1970 ((Tc *)hw)->COUNT8.DRVCTRL.reg ^= TC_DRVCTRL_INVEN0; in hri_tc_toggle_DRVCTRL_INVEN0_bit()1977 ((Tc *)hw)->COUNT8.DRVCTRL.reg |= TC_DRVCTRL_INVEN1; in hri_tc_set_DRVCTRL_INVEN1_bit()1984 tmp = ((Tc *)hw)->COUNT8.DRVCTRL.reg; in hri_tc_get_DRVCTRL_INVEN1_bit()1993 tmp = ((Tc *)hw)->COUNT8.DRVCTRL.reg; in hri_tc_write_DRVCTRL_INVEN1_bit()1996 ((Tc *)hw)->COUNT8.DRVCTRL.reg = tmp; in hri_tc_write_DRVCTRL_INVEN1_bit()[all …]
756 __IO TC_DRVCTRL_Type DRVCTRL; /**< \brief Offset: 0x0D (R/W 8) Control C */ member782 __IO TC_DRVCTRL_Type DRVCTRL; /**< \brief Offset: 0x0D (R/W 8) Control C */ member806 __IO TC_DRVCTRL_Type DRVCTRL; /**< \brief Offset: 0x0D (R/W 8) Control C */ member
1676 __IO TCC_DRVCTRL_Type DRVCTRL; /**< \brief Offset: 0x18 (R/W 32) Driver Control */ member
