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Searched refs:DPLLCTRLB (Results 1 – 2 of 2) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_oscctrl_l21.h2409 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_LPEN; in hri_oscctrl_set_DPLLCTRLB_LPEN_bit()
2416 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg; in hri_oscctrl_get_DPLLCTRLB_LPEN_bit()
2425 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg; in hri_oscctrl_write_DPLLCTRLB_LPEN_bit()
2428 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp; in hri_oscctrl_write_DPLLCTRLB_LPEN_bit()
2435 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_LPEN; in hri_oscctrl_clear_DPLLCTRLB_LPEN_bit()
2442 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_LPEN; in hri_oscctrl_toggle_DPLLCTRLB_LPEN_bit()
2449 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_WUF; in hri_oscctrl_set_DPLLCTRLB_WUF_bit()
2456 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg; in hri_oscctrl_get_DPLLCTRLB_WUF_bit()
2465 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg; in hri_oscctrl_write_DPLLCTRLB_WUF_bit()
2468 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp; in hri_oscctrl_write_DPLLCTRLB_WUF_bit()
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/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Doscctrl.h623 …__IO OSCCTRL_DPLLCTRLB_Type DPLLCTRLB; /**< \brief Offset: 0x30 (R/W 32) Digital Core Configu… member