Home
last modified time | relevance | path

Searched refs:DMA1 (Results 1 – 23 of 23) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_dma.h51 #if defined (DMA1) || defined (DMA2)
376 (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel7)) ? DMA2 : DMA1)
378 #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
437 ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
439 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
441 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
443 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
445 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
447 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
449 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
[all …]
Dstm32l1xx_hal_dma.h433 (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__)))
448 (DMA2->IFCR = (__FLAG__)) : (DMA1->IFCR = (__FLAG__)))
520 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
534 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_dma.h54 #if defined (DMA1) || defined (DMA2)
109 (((__DMA_INSTANCE__) == DMA1) ? 0x00000000U : LL_DMA_CHANNEL_7)
441 (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel7)) ? DMA2 : DMA1)
443 #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
502 ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
504 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
506 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
508 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
510 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
512 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
[all …]
Dstm32l4xx_hal_dma.h579 (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__)))
594 (DMA2->IFCR = (__FLAG__)) : (DMA1->IFCR = (__FLAG__)))
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_dma.h51 #if defined (DMA1)
428 #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
469 ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
470 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
471 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
472 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
473 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
474 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
478 ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
479 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
[all …]
Dstm32l0xx_hal_dma.h192 #define IS_DMA_ALL_CONTROLLER(CONTROLLER) (((CONTROLLER) == DMA1))
557 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
571 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_ll_dma.c50 #if defined (DMA1) || defined (DMA2)
94 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
111 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
127 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
177 if (DMAx == DMA1) in LL_DMA_DeInit()
Dstm32l1xx_hal_dma.c186 hdma->DmaBaseAddress = DMA1; in HAL_DMA_Init()
198 hdma->DmaBaseAddress = DMA1; in HAL_DMA_Init()
265 hdma->DmaBaseAddress = DMA1; in HAL_DMA_DeInit()
277 hdma->DmaBaseAddress = DMA1; in HAL_DMA_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_ll_dma.c50 #if defined (DMA1)
109 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
118 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
126 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
176 if (DMAx == DMA1) in LL_DMA_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_dma.c50 #if defined (DMA1) || defined (DMA2)
106 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
123 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
139 #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \
189 if (DMAx == DMA1) in LL_DMA_DeInit()
Dstm32l4xx_hal_dma.c196 hdma->DmaBaseAddress = DMA1; in HAL_DMA_Init()
271 if (DMA1 == hdma->DmaBaseAddress) in HAL_DMA_Init()
331 hdma->DmaBaseAddress = DMA1; in HAL_DMA_DeInit()
349 if (DMA1 == hdma->DmaBaseAddress) in HAL_DMA_DeInit()
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/arm-std/
Dstartup_stm32l476xx.s103 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
104 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
105 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
106 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
107 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
108 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
109 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/arm-std/
Dstartup_stm32l073xx.s102 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
103 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
104 … DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/arm-std/
Dstartup_stm32l081xx.s102 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
103 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
104 … DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/arm-std/
Dstartup_stm32l072xx.s102 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
103 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
104 … DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h662 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h768 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h710 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h710 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h752 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h795 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h820 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h1407 #define DMA1 ((DMA_TypeDef *) DMA1_BASE) macro