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Searched refs:CFGR2 (Results 1 – 19 of 19) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_system.h372 CLEAR_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN); in LL_SYSCFG_EnableFirewall()
382 return !(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN) == SYSCFG_CFGR2_FWDISEN); in LL_SYSCFG_IsEnabledFirewall()
406 MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA, IoPinConnect); in LL_SYSCFG_SetVLCDRailConnection()
429 return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA)); in LL_SYSCFG_GetVLCDRailConnection()
451 SET_BIT(SYSCFG->CFGR2, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
472 CLEAR_BIT(SYSCFG->CFGR2, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
Dstm32l0xx_hal.h307 MODIFY_REG(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA, (uint32_t)(__SYSCFG_VLCD_CAPA__))
318 #define __HAL_SYSCFG_GET_VLCD_CAPA_CONFIG() READ_BIT(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA)
347 … SET_BIT(SYSCFG->CFGR2, (__FASTMODEPLUS__)); \
357 … CLEAR_BIT(SYSCFG->CFGR2, (__FASTMODEPLUS__)); \
Dstm32l0xx_ll_adc.h1847 MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource); in LL_ADC_SetClock()
1871 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE)); in LL_ADC_GetClock()
3115 MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSE, OvsScope); in LL_ADC_SetOverSamplingScope()
3128 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSE)); in LL_ADC_GetOverSamplingScope()
3152 MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TOVS, OverSamplingDiscont); in LL_ADC_SetOverSamplingDiscont()
3171 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TOVS)); in LL_ADC_GetOverSamplingDiscont()
3209 MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio)); in LL_ADC_ConfigOverSamplingRatioShift()
3228 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)); in LL_ADC_GetOverSamplingRatio()
3248 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS)); in LL_ADC_GetOverSamplingShift()
Dstm32l0xx_hal_adc.h876 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
877 (__HANDLE__)->Instance->CFGR2 |= (__HANDLE__)->Init.ClockPrescaler; \
882 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
Dstm32l0xx_hal_firewall.h170 #define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN)
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal.h467 #define __HAL_SYSCFG_BREAK_ECC_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL)
473 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL)
479 #define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL)
485 #define __HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL)
494 …__) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0…
498 #define __HAL_SYSCFG_CLEAR_FLAG() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF)
Dstm32l4xx_ll_system.h874 …MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL | SYSCFG_CFGR2_SPL | SYSCFG_CFGR2_PVDL | SYSCFG_CFGR2_E… in LL_SYSCFG_SetTIMBreakInputs()
891 …return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL | SYSCFG_CFGR2_SPL | SYSCFG_CFGR2_PVDL … in LL_SYSCFG_GetTIMBreakInputs()
901 return (READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF) == (SYSCFG_CFGR2_SPF)); in LL_SYSCFG_IsActiveFlag_SP()
911 SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF); in LL_SYSCFG_ClearFlag_SP()
Dstm32l4xx_ll_adc.h5420 MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM, OvsScope); in LL_ADC_SetOverSamplingScope()
5445 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM)); in LL_ADC_GetOverSamplingScope()
5472 MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont); in LL_ADC_SetOverSamplingDiscont()
5491 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS)); in LL_ADC_GetOverSamplingDiscont()
5530 MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio)); in LL_ADC_ConfigOverSamplingRatioShift()
5550 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)); in LL_ADC_GetOverSamplingRatio()
5571 return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS)); in LL_ADC_GetOverSamplingShift()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_i2c_ex.c304 SET_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus); in HAL_I2CEx_EnableFastModePlus()
331 CLEAR_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus); in HAL_I2CEx_DisableFastModePlus()
Dstm32l0xx_hal_adc.c534 hadc->Instance->CFGR2 &= ~( ADC_CFGR2_OVSR | in HAL_ADC_Init()
538 hadc->Instance->CFGR2 |= ( hadc->Init.Oversample.Ratio | in HAL_ADC_Init()
543 hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE; in HAL_ADC_Init()
547 if(HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE)) in HAL_ADC_Init()
550 hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE; in HAL_ADC_Init()
652 hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS | ADC_CFGR2_OVSS | ADC_CFGR2_OVSR | \ in HAL_ADC_DeInit()
Dstm32l0xx_hal_firewall.c231 CLEAR_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN); in HAL_FIREWALL_EnableFirewall()
Dstm32l0xx_ll_adc.c395 CLEAR_BIT(ADCx->CFGR2, in LL_ADC_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_adc_ex.c1911 …assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVS… in HAL_ADCEx_InjectedConfigChannel()
1918 MODIFY_REG(hadc->Instance->CFGR2, in HAL_ADCEx_InjectedConfigChannel()
1930 CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_JOVSE); in HAL_ADCEx_InjectedConfigChannel()
Dstm32l4xx_hal_adc.c650 MODIFY_REG(hadc->Instance->CFGR2, in HAL_ADC_Init()
665 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE); in HAL_ADC_Init()
798 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSM | ADC_CFGR2_TROVS | ADC_CFGR2_OVSS | in HAL_ADC_DeInit()
Dstm32l4xx_ll_adc.c609 CLEAR_BIT(ADCx->CFGR2, in LL_ADC_DeInit()
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h148 …__IO uint32_t CFGR2; /*!< ADC Configuration register 2, Addre… member
338 …__IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offs… member
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h151 …__IO uint32_t CFGR2; /*!< ADC Configuration register 2, Addre… member
356 …__IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offs… member
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h150 …__IO uint32_t CFGR2; /*!< ADC Configuration register 2, Addre… member
355 …__IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offs… member
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h200 …__IO uint32_t CFGR2; /*!< ADC configuration register 2, Address offset: 0x… member
900 …__IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offset:… member