| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/ |
| D | stm32l4xx_hal_usart_ex.c | 193 uint32_t tmpcr1; in HAL_USARTEx_EnableSlaveMode() local
204 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_EnableSlaveMode()
219 WRITE_REG(husart->Instance->CR1, tmpcr1); in HAL_USARTEx_EnableSlaveMode()
241 uint32_t tmpcr1; in HAL_USARTEx_DisableSlaveMode() local
252 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_DisableSlaveMode()
261 WRITE_REG(husart->Instance->CR1, tmpcr1); in HAL_USARTEx_DisableSlaveMode()
289 uint32_t tmpcr1; in HAL_USARTEx_ConfigNSS() local
301 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_ConfigNSS()
310 WRITE_REG(husart->Instance->CR1, tmpcr1); in HAL_USARTEx_ConfigNSS()
329 uint32_t tmpcr1; in HAL_USARTEx_EnableFifoMode() local
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| D | stm32l4xx_hal_smartcard_ex.c | 286 uint32_t tmpcr1; in HAL_SMARTCARDEx_EnableFifoMode() local
297 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_EnableFifoMode()
303 SET_BIT(tmpcr1, USART_CR1_FIFOEN); in HAL_SMARTCARDEx_EnableFifoMode()
307 WRITE_REG(hsmartcard->Instance->CR1, tmpcr1); in HAL_SMARTCARDEx_EnableFifoMode()
327 uint32_t tmpcr1; in HAL_SMARTCARDEx_DisableFifoMode() local
338 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_DisableFifoMode()
344 CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); in HAL_SMARTCARDEx_DisableFifoMode()
348 WRITE_REG(hsmartcard->Instance->CR1, tmpcr1); in HAL_SMARTCARDEx_DisableFifoMode()
373 uint32_t tmpcr1; in HAL_SMARTCARDEx_SetTxFifoThreshold() local
385 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_SetTxFifoThreshold()
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| D | stm32l4xx_hal_uart_ex.c | 556 uint32_t tmpcr1 = 0U; in HAL_UARTEx_EnableFifoMode() local
567 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_EnableFifoMode()
573 SET_BIT(tmpcr1, USART_CR1_FIFOEN); in HAL_UARTEx_EnableFifoMode()
577 WRITE_REG(huart->Instance->CR1, tmpcr1); in HAL_UARTEx_EnableFifoMode()
597 uint32_t tmpcr1 = 0U; in HAL_UARTEx_DisableFifoMode() local
608 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_DisableFifoMode()
614 CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); in HAL_UARTEx_DisableFifoMode()
618 WRITE_REG(huart->Instance->CR1, tmpcr1); in HAL_UARTEx_DisableFifoMode()
643 uint32_t tmpcr1 = 0U; in HAL_UARTEx_SetTxFifoThreshold() local
655 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_SetTxFifoThreshold()
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| D | stm32l4xx_ll_tim.c | 341 uint32_t tmpcr1; in LL_TIM_Init() local
348 tmpcr1 = LL_TIM_ReadReg(TIMx, CR1); in LL_TIM_Init()
353 MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode); in LL_TIM_Init()
359 MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision); in LL_TIM_Init()
363 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
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| D | stm32l4xx_hal_tim.c | 5600 uint32_t tmpcr1; in TIM_Base_SetConfig() local
5601 tmpcr1 = TIMx->CR1; in TIM_Base_SetConfig()
5607 tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); in TIM_Base_SetConfig()
5608 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
5614 tmpcr1 &= ~TIM_CR1_CKD; in TIM_Base_SetConfig()
5615 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
5619 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
5621 TIMx->CR1 = tmpcr1; in TIM_Base_SetConfig()
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| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/ |
| D | stm32l1xx_ll_tim.c | 263 uint32_t tmpcr1 = 0U; in LL_TIM_Init() local
270 tmpcr1 = LL_TIM_ReadReg(TIMx, CR1); in LL_TIM_Init()
275 MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode); in LL_TIM_Init()
281 MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision); in LL_TIM_Init()
285 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
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| D | stm32l1xx_hal_tim.c | 4457 uint32_t tmpcr1 = 0; in TIM_Base_SetConfig() local
4458 tmpcr1 = TIMx->CR1; in TIM_Base_SetConfig()
4464 tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); in TIM_Base_SetConfig()
4465 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
4471 tmpcr1 &= ~TIM_CR1_CKD; in TIM_Base_SetConfig()
4472 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
4475 TIMx->CR1 = tmpcr1; in TIM_Base_SetConfig()
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| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/ |
| D | stm32l0xx_ll_tim.c | 240 uint32_t tmpcr1 = 0U; in LL_TIM_Init() local
247 tmpcr1 = LL_TIM_ReadReg(TIMx, CR1); in LL_TIM_Init()
252 MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode); in LL_TIM_Init()
258 MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision); in LL_TIM_Init()
262 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
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| D | stm32l0xx_hal_tim.c | 4387 uint32_t tmpcr1 = 0U; in TIM_Base_SetConfig() local
4388 tmpcr1 = TIMx->CR1; in TIM_Base_SetConfig()
4394 tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); in TIM_Base_SetConfig()
4395 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
4401 tmpcr1 &= ~TIM_CR1_CKD; in TIM_Base_SetConfig()
4402 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
4405 TIMx->CR1 = tmpcr1; in TIM_Base_SetConfig()
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