Searched refs:tmpccmr2 (Results 1 – 6 of 6) sorted by relevance
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/ |
| D | stm32l1xx_ll_tim.c | 628 uint32_t tmpccmr2 = 0U; in OC3Config() local
648 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC3Config()
651 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S); in OC3Config()
654 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode); in OC3Config()
666 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC3Config()
687 uint32_t tmpccmr2 = 0U; in OC4Config() local
707 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC4Config()
710 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S); in OC4Config()
713 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U); in OC4Config()
725 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC4Config()
|
| D | stm32l1xx_hal_tim.c | 5005 uint32_t tmpccmr2 = 0; in TIM_TI3_SetConfig() local
5010 tmpccmr2 = TIMx->CCMR2; in TIM_TI3_SetConfig()
5014 tmpccmr2 &= ~TIM_CCMR2_CC3S; in TIM_TI3_SetConfig()
5015 tmpccmr2 |= TIM_ICSelection; in TIM_TI3_SetConfig()
5018 tmpccmr2 &= ~TIM_CCMR2_IC3F; in TIM_TI3_SetConfig()
5019 tmpccmr2 |= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F); in TIM_TI3_SetConfig()
5026 TIMx->CCMR2 = tmpccmr2; in TIM_TI3_SetConfig()
5053 uint32_t tmpccmr2 = 0; in TIM_TI4_SetConfig() local
5058 tmpccmr2 = TIMx->CCMR2; in TIM_TI4_SetConfig()
5062 tmpccmr2 &= ~TIM_CCMR2_CC4S; in TIM_TI4_SetConfig()
[all …]
|
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/ |
| D | stm32l0xx_ll_tim.c | 606 uint32_t tmpccmr2 = 0U; in OC3Config() local
626 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC3Config()
629 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S); in OC3Config()
632 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode); in OC3Config()
644 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC3Config()
665 uint32_t tmpccmr2 = 0U; in OC4Config() local
685 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC4Config()
688 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S); in OC4Config()
691 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U); in OC4Config()
703 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC4Config()
|
| D | stm32l0xx_hal_tim.c | 4795 uint32_t tmpccmr2 = 0U; in TIM_TI3_SetConfig() local
4800 tmpccmr2 = TIMx->CCMR2; in TIM_TI3_SetConfig()
4804 tmpccmr2 &= ~TIM_CCMR2_CC3S; in TIM_TI3_SetConfig()
4805 tmpccmr2 |= TIM_ICSelection; in TIM_TI3_SetConfig()
4808 tmpccmr2 &= ~TIM_CCMR2_IC3F; in TIM_TI3_SetConfig()
4809 tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); in TIM_TI3_SetConfig()
4816 TIMx->CCMR2 = tmpccmr2; in TIM_TI3_SetConfig()
4840 uint32_t tmpccmr2 = 0U; in TIM_TI4_SetConfig() local
4845 tmpccmr2 = TIMx->CCMR2; in TIM_TI4_SetConfig()
4849 tmpccmr2 &= ~TIM_CCMR2_CC4S; in TIM_TI4_SetConfig()
[all …]
|
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/ |
| D | stm32l4xx_ll_tim.c | 958 uint32_t tmpccmr2; in OC3Config() local
980 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC3Config()
983 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S); in OC3Config()
986 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode); in OC3Config()
1016 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC3Config()
1037 uint32_t tmpccmr2; in OC4Config() local
1059 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC4Config()
1062 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S); in OC4Config()
1065 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U); in OC4Config()
1086 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC4Config()
|
| D | stm32l4xx_hal_tim.c | 6339 uint32_t tmpccmr2; in TIM_TI3_SetConfig() local
6344 tmpccmr2 = TIMx->CCMR2; in TIM_TI3_SetConfig()
6348 tmpccmr2 &= ~TIM_CCMR2_CC3S; in TIM_TI3_SetConfig()
6349 tmpccmr2 |= TIM_ICSelection; in TIM_TI3_SetConfig()
6352 tmpccmr2 &= ~TIM_CCMR2_IC3F; in TIM_TI3_SetConfig()
6353 tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); in TIM_TI3_SetConfig()
6360 TIMx->CCMR2 = tmpccmr2; in TIM_TI3_SetConfig()
6387 uint32_t tmpccmr2; in TIM_TI4_SetConfig() local
6392 tmpccmr2 = TIMx->CCMR2; in TIM_TI4_SetConfig()
6396 tmpccmr2 &= ~TIM_CCMR2_CC4S; in TIM_TI4_SetConfig()
[all …]
|
