Searched refs:TSR (Results 1 – 4 of 4) sorted by relevance
532 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) …562 ((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))):…586 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN…587 …((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN…588 …((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP…608 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\609 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\610 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
1242 uint32_t tsr = READ_REG(hcan->Instance->TSR); in HAL_CAN_AddTxMessage()1360 SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); in HAL_CAN_AbortTxRequest()1367 SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); in HAL_CAN_AbortTxRequest()1374 SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); in HAL_CAN_AbortTxRequest()1404 if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) in HAL_CAN_GetTxMailboxesFreeLevel()1410 if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) in HAL_CAN_GetTxMailboxesFreeLevel()1416 if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) in HAL_CAN_GetTxMailboxesFreeLevel()1450 …if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_Pos)) in HAL_CAN_IsTxMessagePending()1716 uint32_t tsrflags = READ_REG(hcan->Instance->TSR); in HAL_CAN_IRQHandler()
606 …((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK)…637 …((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))…
287 …__IO uint32_t TSR; /*!< CAN transmit status register, Address … member
