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Searched refs:TR1 (Results 1 – 4 of 4) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_adc.c629 MODIFY_REG(ADCx->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, ADC_TR1_HT1); in LL_ADC_DeInit()
Dstm32l4xx_hal_adc.c810 CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); in HAL_ADC_DeInit()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_adc.h5272 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> … in LL_ADC_ConfigAnalogWDThresholds()
5340 …register uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> … in LL_ADC_SetAnalogWDThresholds()
5377 …register const uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MAS… in LL_ADC_GetAnalogWDThresholds()
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h204 …__IO uint32_t TR1; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x… member