Searched refs:TIM_CCMR1_OC1CE (Results 1 – 14 of 14) sorted by relevance
1596 SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_EnableClear()1619 CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_DisableClear()1644 register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; in LL_TIM_OC_IsEnabledClear()
1621 SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_EnableClear()1644 CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_DisableClear()1669 register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; in LL_TIM_OC_IsEnabledClear()
2468 SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_EnableClear()2495 CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_DisableClear()2524 register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; in LL_TIM_OC_IsEnabledClear()
3727 htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; in HAL_TIM_ConfigOCrefClear()3732 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; in HAL_TIM_ConfigOCrefClear()
3677 htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; in HAL_TIM_ConfigOCrefClear()3682 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; in HAL_TIM_ConfigOCrefClear()
4396 SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); in HAL_TIM_ConfigOCrefClear()4401 CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); in HAL_TIM_ConfigOCrefClear()
5591 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro
5953 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro
6112 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro
5849 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro
6673 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro
6975 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro
14254 #define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1… macro