TIM_BDTR_BKE (reference) in projects: loramac-node-2.7.6

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Searched refs:TIM_BDTR_BKE (Results 1 – 5 of 5) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
D	stm32l4xx_ll_tim.h	`576 #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /!< Break function enabled / 3439 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK() 3452 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()`
D	stm32l4xx_hal_tim.h	`825 #define TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break input BR…`
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
D	stm32l4xx_hal_tim_ex.c	`1686 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); in HAL_TIMEx_ConfigBreakDeadTime()`
D	stm32l4xx_ll_tim.c	`751 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); in LL_TIM_BDTR_Init()`
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
D	stm32l476xx.h	`14577 #define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable for… macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
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