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Searched refs:SR2 (Results 1 – 12 of 12) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_pwr.h1530 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO4) == (PWR_SR2_PVMO4)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO4()
1540 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO3) == (PWR_SR2_PVMO3)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO3()
1551 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO2) == (PWR_SR2_PVMO2)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO2()
1563 return ((READ_BIT(PWR->SR2, PWR_SR2_PVMO1) == (PWR_SR2_PVMO1)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVMO1()
1574 return ((READ_BIT(PWR->SR2, PWR_SR2_PVDO) == (PWR_SR2_PVDO)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_PVDO()
1584 return ((READ_BIT(PWR->SR2, PWR_SR2_VOSF) == (PWR_SR2_VOSF)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VOS()
1595 return ((READ_BIT(PWR->SR2, PWR_SR2_REGLPF) == (PWR_SR2_REGLPF)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_REGLPF()
1605 return ((READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == (PWR_SR2_REGLPS)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_REGLPS()
Dstm32l4xx_hal_pwr.h213 (PWR->SR2 & (1U << ((__FLAG__) & 31U))) )
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_pwr_ex.c200 while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) in HAL_PWREx_ControlVoltageScaling()
204 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) in HAL_PWREx_ControlVoltageScaling()
229 while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) in HAL_PWREx_ControlVoltageScaling()
233 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) in HAL_PWREx_ControlVoltageScaling()
265 while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) in HAL_PWREx_ControlVoltageScaling()
269 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) in HAL_PWREx_ControlVoltageScaling()
1140 while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U)) in HAL_PWREx_DisableLowPowerRunMode()
1144 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) in HAL_PWREx_DisableLowPowerRunMode()
Dstm32l4xx_hal_pwr.c471 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) in HAL_PWR_EnterSLEEPMode()
484 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET) in HAL_PWR_EnterSLEEPMode()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_i2c.h1329 return (READ_BIT(I2Cx->SR2, I2C_SR2_BUSY) == (I2C_SR2_BUSY)); in LL_I2C_IsActiveFlag_BUSY()
1342 return (READ_BIT(I2Cx->SR2, I2C_SR2_DUALF) == (I2C_SR2_DUALF)); in LL_I2C_IsActiveFlag_DUAL()
1358 return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBHOST) == (I2C_SR2_SMBHOST)); in LL_I2C_IsActiveSMBusFlag_SMBHOST()
1374 return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBDEFAULT) == (I2C_SR2_SMBDEFAULT)); in LL_I2C_IsActiveSMBusFlag_SMBDEFAULT()
1388 return (READ_BIT(I2Cx->SR2, I2C_SR2_GENCALL) == (I2C_SR2_GENCALL)); in LL_I2C_IsActiveFlag_GENCALL()
1401 return (READ_BIT(I2Cx->SR2, I2C_SR2_MSL) == (I2C_SR2_MSL)); in LL_I2C_IsActiveFlag_MSL()
1417 tmpreg = I2Cx->SR2; in LL_I2C_ClearFlag_ADDR()
1646 return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_TRA)); in LL_I2C_GetTransferDirection()
1735 return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_PEC) >> I2C_SR2_PEC_Pos); in LL_I2C_GetSMBusPEC()
Dstm32l1xx_hal_i2c.h429 …(((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) …
451 tmpreg = (__HANDLE__)->Instance->SR2; \
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_i2c.c3275 uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2); in HAL_I2C_EV_IRQHandler()
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h355 …__IO uint32_t SR2; /*!< I2C Status register 2, Address offset: 0x18… member
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h355 …__IO uint32_t SR2; /*!< I2C Status register 2, Address offset: 0x18… member
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h385 …__IO uint32_t SR2; /*!< I2C Status register 2, Address offset: 0x18… member
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h394 …__IO uint32_t SR2; /*!< I2C Status register 2, Address offset: 0x18… member
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h654 __IO uint32_t SR2; /*!< PWR power status register 2, Address offset: 0x14 */ member